Add I2C device node data for exynos
Signed-off-by: Rajeshwari Shinde rajeshwari.s@samsung.com Acked-by: Simon Glass sjg@chromium.org --- Changes in V2: Added Periph id to the I2C device node arch/arm/dts/exynos-periph-id.dtsi | 35 +++++++++++++++++ arch/arm/dts/exynos5250.dtsi | 73 ++++++++++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+), 0 deletions(-) create mode 100644 arch/arm/dts/exynos-periph-id.dtsi
diff --git a/arch/arm/dts/exynos-periph-id.dtsi b/arch/arm/dts/exynos-periph-id.dtsi new file mode 100644 index 0000000..cfe2c3d --- /dev/null +++ b/arch/arm/dts/exynos-periph-id.dtsi @@ -0,0 +1,35 @@ +/* + * U-Boot Peripheral ID header file for Exynos boards + * + * Copyright (c) 2012 The Chromium OS Authors. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * These values come from arch/arm/include/arch-exynos5/periph.h. For + * now they must be manually kept in sync. + */ +/define/ PERIPH_ID_I2C0 <0>; +/define/ PERIPH_ID_I2C1 <1>; +/define/ PERIPH_ID_I2C2 <2>; +/define/ PERIPH_ID_I2C3 <3>; +/define/ PERIPH_ID_I2C4 <4>; +/define/ PERIPH_ID_I2C5 <5>; +/define/ PERIPH_ID_I2C6 <6>; +/define/ PERIPH_ID_I2C7 <7>; diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi index db22db6..ae71ae4 100644 --- a/arch/arm/dts/exynos5250.dtsi +++ b/arch/arm/dts/exynos5250.dtsi @@ -18,6 +18,7 @@ */
/include/ "skeleton.dtsi" +/include/ "exynos-periph-id.dtsi"
/ { compatible = "samsung,exynos5250"; @@ -33,4 +34,76 @@ compatible = "samsung,exynos-tmu"; reg = <0x10060000 0xffff>; }; + + i2c@12c60000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C60000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C0>; + interrupts = <0 56 0>; + }; + + i2c@12c70000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C70000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C1>; + interrupts = <0 57 0>; + }; + + i2c@12c80000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C80000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C2>; + interrupts = <0 58 0>; + }; + + i2c@12c90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C90000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C3>; + interrupts = <0 59 0>; + }; + + i2c@12ca0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CA0000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C4>; + interrupts = <0 60 0>; + }; + + i2c@12cb0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CB0000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C5>; + interrupts = <0 61 0>; + }; + + i2c@12cc0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CC0000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C6>; + interrupts = <0 62 0>; + }; + + i2c@12cd0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CD0000 0x100>; + samsung,periph-id = <PERIPH_ID_I2C7>; + interrupts = <0 63 0>; + }; };