hi,all Sorry for the previous unreadable message. I resend it. I have a problem using MPC8272 PCI bridge. Currently I am debugging our own board with a MPC8272 and PCI IDE chip (VIA VT6410). However I can not visit the memory of PCI space. When I type "md F40001F0", there is always a program check. My configuration is as follows:
* 0x00000000-0x07FFFFFF 128MB SDRAM * 0x80000000-0x9FFFFFFF 512MB outboundprefetchable PCI memory window * 0xA0000000-0xBFFFFFFF 512MB outbound non-prefetchable PCI memory window * 0xF0000000-0xF001FFFF 128KB MPC8272 internal memory * 0xF4000000-0xF7FFFFFF 64MB outbound PCI I/O window * 0xFE000000-0xFFFFFFFF 32MB flash /* PCIBR0 */ #define CFG_PCI_MSTR0_LOCAL 0x80000000 /* Local base */ #define CFG_PCIMSK0_MASK PCIMSK_1GB /* Size of window */ /* PCIBR1 */ #define CFG_PCI_MSTR1_LOCAL 0xF4000000 /* Local base */ #define CFG_PCIMSK1_MASK PCIMSK_64MB /* Size of window */
#define CFG_PCI_MSTR_IO_LOCAL 0xF4000000/* Local base */ #define CFG_PCI_MSTR_IO_BUS 0xF4000000 /* PCI base */ #define CFG_CPU_PCI_IO_START PCI_MSTR_IO_LOCAL #define CFG_PCI_MSTR_IO_SIZE 0x04000000 /* 64MB */ #define CFG_POCMR2_MASK_ATTRIB (POCMR_MASK_64MB | POCMR_ENABLE | POCMR_PCI_IO) So, I am wondering why the configured PCI space can not be accessed since I have configured the outbound window and PCIBR? In MPC8241, I can access PCI space by "md FE0001F0". Best regard Jack liu
I suspect one of your base registers (BR1) overlaps the memory range that the pci bridge is configured for. It's probably BR1 since I believe that's normally 0xf4500000 for the BMSR on your board. You need to change PCI I/O memory window to some other range...
Regards,
Russell