Re: [U-Boot] [PATCH v3 064/108] x86: Add support for newer CAR schemes

On Mon, Oct 21, 2019 at 7:01 AM Simon Glass sjg@chromium.org wrote:

Newer Intel SoCs have different ways of setting up cache-as-ram (CAR). Add support for these along with suitable configuration options.

+#if ((CONFIG_DCACHE_RAM_SIZE & (CONFIG_DCACHE_RAM_SIZE - 1)) == 0)

Perhaps it would be useful to have a generic macro

#define CONFIG_VALUE_IS_POWER_OF_2(_x) (CONFIG_##_x ...)

+#elif (CONFIG_DCACHE_RAM_SIZE == 768 * KiB) /* 768 KiB */

+#else +#error "DCACHE_RAM_SIZE is not a power of 2 and setup code is missing" +#endif