
28 Jul
2020
28 Jul
'20
3:40 p.m.
On 7/24/20 11:21 AM, Patrick Delaunay wrote:
Since commit d877f8fd0f09 ("arm: provide a function for boards init code to modify MMU virtual-physical map") the parameter of mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE aligned.
Signed-off-by: Patrick Delaunay patrick.delaunay@st.com
arch/arm/mach-stm32mp/cpu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 56092c8bf6..b7fcee2b36 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -225,9 +225,10 @@ static void early_enable_caches(void) dcache_enable();
if (IS_ENABLED(CONFIG_SPL_BUILD))
mmu_set_region_dcache_behaviour(STM32_SYSRAM_BASE,
STM32_SYSRAM_SIZE,
DCACHE_DEFAULT_OPTION);
mmu_set_region_dcache_behaviour(
ALIGN(STM32_SYSRAM_BASE, MMU_SECTION_SIZE),
round_up(STM32_SYSRAM_SIZE, MMU_SECTION_SIZE),
else mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE, DCACHE_DEFAULT_OPTION);DCACHE_DEFAULT_OPTION);
Reviewed-by: Patrice Chotard patrice.chotard@st.com
Thanks
Patrice