Add support SH4 cache control and flash_cache function
Signed-off-by: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- cpu/sh4/cpu.c | 3 ++- include/asm-sh/cache.h | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletions(-) create mode 100644 include/asm-sh/cache.h
diff --git a/cpu/sh4/cpu.c b/cpu/sh4/cpu.c index 0ebf951..d94e139 100644 --- a/cpu/sh4/cpu.c +++ b/cpu/sh4/cpu.c @@ -24,6 +24,7 @@ #include <common.h> #include <command.h> #include <asm/processor.h> +#include <asm/cache.h>
int checkcpu(void) { @@ -51,7 +52,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
void flush_cache (unsigned long addr, unsigned long size) { - + dcache_invalid_range( addr , addr + size ); }
void icache_enable (void) diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h new file mode 100644 index 0000000..b987bbb --- /dev/null +++ b/include/asm-sh/cache.h @@ -0,0 +1,35 @@ +#ifndef __ASM_SH_CACHE_H +#define __ASM_SH_CACHE_H + +#if defined(CONFIG_SH4) + +#define L1_CACHE_BYTES 32 +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) (*(struct __large_struct *)(x)) + +void dcache_wback_range(u32 start, u32 end) +{ + u32 v; + + start &= ~(L1_CACHE_BYTES-1); + for (v = start; v < end; v+=L1_CACHE_BYTES) { + asm volatile("ocbwb %0" + : /* no output */ + : "m" (__m(v))); + } +} + +void dcache_invalid_range(u32 start, u32 end) +{ + u32 v; + + start &= ~(L1_CACHE_BYTES-1); + for (v = start; v < end; v+=L1_CACHE_BYTES) { + asm volatile("ocbi %0" + : /* no output */ + : "m" (__m(v))); + } +} +#endif /* CONFIG_SH4 */ + +#endif /* __ASM_SH_CACHE_H */