Signed-off-by: Victor Gallardo vgallardo@amcc.com Signed-off-by: Adam Graham agraham@amcc.com --- board/amcc/kilauea/kilauea.c | 31 +++++++++++++++++++++++++++++++ cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c | 5 ----- include/asm-ppc/ppc4xx-sdram.h | 8 ++++++++ 3 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/board/amcc/kilauea/kilauea.c b/board/amcc/kilauea/kilauea.c index 7b10255..8163d16 100644 --- a/board/amcc/kilauea/kilauea.c +++ b/board/amcc/kilauea/kilauea.c @@ -374,3 +374,34 @@ int post_hotkeys_pressed(void) return 0; /* No hotkeys supported */ } #endif /* CONFIG_POST */ + +#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) +/* + * This is for quicker auto calibration boot up once WRDTR and CLKTR + * values for the kilauea board were determined and are therefore known. + * + * Use these scan options for PLB bus greater than 200MHz else use + * the defaults. + */ +/* List of (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CLKP]) pairs to try */ +struct sdram_timing quick_scan_options[] = { + {0, 3}, {1, 1}, {1, 2}, {1, 3}, + {2, 1}, {2, 2}, {2, 3}, {3, 1}, + {3, 2}, {4, 1}, {-1, -1} +}; + +ulong ddr_scan_option(ulong default_val) +{ + u32 sdram_freq; + PPC4xx_SYS_INFO board_cfg; + + get_sys_info(&board_cfg); + sdram_freq = board_cfg.freqPLB; + + /* PLB bus greater than 200MHz */ + if (sdram_freq >= 0xbebc200) + return (ulong)(quick_scan_options); + else + return (ulong)default_val; +} +#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ diff --git a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index 83b9883..3ba8176 100644 --- a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -79,11 +79,6 @@ struct ddrautocal { u32 flags; };
-struct sdram_timing { - u32 wrdtr; - u32 clktr; -}; - struct sdram_timing_clks { u32 wrdtr; u32 clktr; diff --git a/include/asm-ppc/ppc4xx-sdram.h b/include/asm-ppc/ppc4xx-sdram.h index 8efa557..50148c5 100644 --- a/include/asm-ppc/ppc4xx-sdram.h +++ b/include/asm-ppc/ppc4xx-sdram.h @@ -1403,6 +1403,14 @@ #endif /* CONFIG_SDRAM_PPC4xx_DENALI_DDR2 */
#ifndef __ASSEMBLY__ + +#if defined(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) +struct sdram_timing { + u32 wrdtr; + u32 clktr; +}; +#endif /* CONFIG_PPC4xx_DDR_AUTOCALIBRATION */ + /* * Prototypes */