From: Suniel Mahesh sunil@amarulasolutions.com
roc-pc-rk3399 target has an add-on board, this add-on board hosts a CW2015 chip which is connected as slave to I2C2. In order to dynamically detect this add-on board at runtime, I2C2 is probed in SPL. If probe is successfull then a corresponding dtb is loaded, else regular dtb is loaded for the u-boot proper.
Signed-off-by: Suniel Mahesh sunil@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 56 +++++++++++++++++++++++++++++ configs/roc-pc-rk3399_defconfig | 2 ++ 2 files changed, 58 insertions(+)
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index 7c3a803..b3cbfaa 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -32,6 +32,62 @@ out: } #endif
+#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) + +#include <i2c.h> + +#define BUS_NUM 2 +#define ROC_RK3399_MEZZ_BAT_ADDR 0x62 + +enum roc_rk3399_pc_board_type { + ROC_RK3399_PC, /* roc-rk3399-pc base board */ + ROC_RK3399_MEZZ_M2_POE, /* roc-rk3399-Mezz M.2 PoE */ +}; + +int board_early_init_f(void) +{ + struct udevice *bus, *dev; + int ret; + + /* default board type */ + gd->board_type = ROC_RK3399_PC; + + ret = uclass_get_device_by_seq(UCLASS_I2C, BUS_NUM, &bus); + if (ret) { + debug("failed to get i2c bus 2\n"); + return ret; + } + + ret = dm_i2c_probe(bus, ROC_RK3399_MEZZ_BAT_ADDR, 0, &dev); + if (ret) { + debug("failed to probe i2c2 battery controller IC\n"); + return ret; + } + + gd->board_type = ROC_RK3399_MEZZ_M2_POE; + + return 0; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (gd->board_type == ROC_RK3399_PC) { + if (!strcmp(name, "rk3399-roc-pc.dtb")) + return 0; + } + + if (gd->board_type == ROC_RK3399_MEZZ_M2_POE) { + if (!strcmp(name, "rk3399-roc-pc-mezzanine.dtb")) + return 0; + } + + return -EINVAL; +} +#endif + +#endif /* CONFIG_SPL_BUILD */ + #if defined(CONFIG_TPL_BUILD)
#define GPIO0_BASE 0xff720000 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 4d1a077..e56fd3d 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_TYPES=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 @@ -25,6 +26,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" +CONFIG_OF_LIST="rk3399-roc-pc rk3399-roc-pc-mezzanine" CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y