-----Original Message----- From: Michal Simek michal.simek@xilinx.com Sent: 2019年4月16日 16:04 To: Peng Ma peng.ma@nxp.com; albert.u.boot@aribaud.net; sjg@chromium.org; Fabio Estevam fabio.estevam@nxp.com; York Sun york.sun@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com Cc: Andy Tang andy.tang@nxp.com; Yinbo Zhu yinbo.zhu@nxp.com; michal.simek@xilinx.com; u-boot@lists.denx.de Subject: [EXT] Re: [PATCH 1/2] scsi: ceva: Clean up the driver code
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On 16. 04. 19 9:28, Peng Ma wrote:
Distinguish the ecc val by chassis version and move the ecc addr to dts. Add ls1028a soc support.
Signed-off-by: Peng Ma peng.ma@nxp.com
drivers/ata/sata_ceva.c | 43
+++++++++++++++++++++++++------------------
1 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c index 8887be9..d26f712 100644 --- a/drivers/ata/sata_ceva.c +++ b/drivers/ata/sata_ceva.c @@ -88,20 +88,16 @@ #define LS1021_CEVA_PHY4_CFG 0x064a080b #define
LS1021_CEVA_PHY5_CFG
0x2aa86470
-/* for ls1088a */ -#define LS1088_ECC_DIS_ADDR_CH2 0x100520 -#define LS1088_ECC_DIS_VAL_CH2 0x40000000
-/* ecc addr-val pair */ -#define ECC_DIS_ADDR_CH2 0x20140520 +/* ecc val pair */ +#define ECC_DIS_VAL_CH1 0x00020000 #define ECC_DIS_VAL_CH2 0x80000000 -#define SATA_ECC_REG_ADDR 0x20220520 -#define SATA_ECC_DISABLE 0x00020000 +#define ECC_DIS_VAL_CH3 0x40000000
enum ceva_soc { CEVA_1V84, CEVA_LS1012A, CEVA_LS1021A,
CEVA_LS1028A, CEVA_LS1043A, CEVA_LS1046A, CEVA_LS1088A,@@ -110,12 +106,14 @@ enum ceva_soc {
struct ceva_sata_priv { ulong base;
ulong ecc_base; enum ceva_soc soc; ulong flag;};
static int ceva_init_sata(struct ceva_sata_priv *priv) {
ulong ecc_addr = priv->ecc_base; ulong base = priv->base; ulong tmp;@@ -132,38 +130,38 @@ static int ceva_init_sata(struct ceva_sata_priv
*priv)
break; case CEVA_LS1021A:
writel(SATA_ECC_DISABLE, SATA_ECC_REG_ADDR);
if (ecc_addr)writel(ECC_DIS_VAL_CH1, ecc_addr); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(LS1021_CEVA_PHY2_CFG, base +AHCI_VEND_PP2C);
writel(LS1021_CEVA_PHY3_CFG, base +AHCI_VEND_PP3C);
writel(LS1021_CEVA_PHY4_CFG, base +AHCI_VEND_PP4C);
writel(LS1021_CEVA_PHY5_CFG, base +AHCI_VEND_PP5C);
writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base +LS1021_AHCI_VEND_AXICC);
break; case CEVA_LS1012A: case CEVA_LS1043A: case CEVA_LS1046A:
writel(ECC_DIS_VAL_CH2, ECC_DIS_ADDR_CH2);/* fallthrough */ case CEVA_LS2080A:
if (ecc_addr)writel(ECC_DIS_VAL_CH2, ecc_addr); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base +AHCI_VEND_AXICC);
break;
case CEVA_LS1028A: case CEVA_LS1088A:
writel(LS1088_ECC_DIS_VAL_CH2,LS1088_ECC_DIS_ADDR_CH2);
if (ecc_addr)writel(ECC_DIS_VAL_CH3, ecc_addr); writel(CEVA_PHY1_CFG, base + AHCI_VEND_PPCFG); writel(CEVA_TRANS_CFG, base + AHCI_VEND_PTC);
if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base +AHCI_VEND_AXICC);
break; }
if (priv->flag & FLAG_COHERENT)writel(CEVA_AXICC_CFG, base + AHCI_VEND_AXICC);return 0;}
@@ -187,6 +185,7 @@ static const struct udevice_id sata_ceva_ids[] = { { .compatible = "ceva,ahci-1v84", .data = CEVA_1V84 }, { .compatible = "fsl,ls1012a-ahci", .data = CEVA_LS1012A }, { .compatible = "fsl,ls1021a-ahci", .data = CEVA_LS1021A },
{ .compatible = "fsl,ls1028a-ahci", .data = CEVA_LS1028A }, { .compatible = "fsl,ls1043a-ahci", .data = CEVA_LS1043A }, { .compatible = "fsl,ls1046a-ahci", .data = CEVA_LS1046A }, { .compatible = "fsl,ls1088a-ahci", .data = CEVA_LS1088A }, @@-205,8 +204,16 @@ static int sata_ceva_ofdata_to_platdata(struct udevice
*dev)
if (priv->base == FDT_ADDR_T_NONE) return -EINVAL;
priv->ecc_base = dev_read_addr_index(dev, 1);It would be better to do it via reg-name instead of index. But that's up to your binding doc.
[Peng Ma] OK, could I change arch/arm/dts/zynqmp.dtsi file sata node as fallows?
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index dfb6ebc..9ad2d84 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -692,6 +692,7 @@ compatible = "ceva,ahci-1v84"; status = "disabled"; reg = <0x0 0xfd0c0000 0x0 0x2000>; + reg-names = "serdes"; interrupt-parent = <&gic>; interrupts = <0 133 4>; #stream-id-cells = <4>; Best Regards, Peng
Thanks, Michal