Hi Simon,
On 15.12.2015 20:57, Simon Glass wrote:
Hi Vladimir,
On 12 December 2015 at 17:48, Vladimir Zapolskiy vz@mleia.com wrote:
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Note, CONFIG_SPL_DM option noticeably increases SPL image, if just NAND SLC and DM version of NS16650 are included to the image, the size of SPL image is increased almost in two times from 10672 bytes to 19704 bytes. If SPL image is downloaded from a small page NAND device, then this can cause a problem, according to the LPC32xx User's Manual the maximum size of a secondary bootloader stored on small page NAND flash should not exceed 15.5KB (maximum size of a secondary bootloader on a large page NAND is 54KB).
Because SPL_DM requires malloc(), enable CONFIG_SYS_MALLOC_SIMPLE for all LPC32xx boards in shared config.h file.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 2 +- arch/arm/include/asm/arch-lpc32xx/config.h | 24 ++++++------------------ configs/devkit3250_defconfig | 1 + configs/work_92105_defconfig | 1 + 4 files changed, 9 insertions(+), 19 deletions(-)
You are bringing in the full malloc(). Try adding:
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
to your defconfig. The should cut the size increment to just under 5KB.
thank you for the hint, I was not aware of this option.
The size of SPL image dropped from 19704 down to 15608 bytes for devkit3250, and I verified that the new image works.
I checked the difference with objdump (10672 -> 15608):
* +3236 bytes of alloc/DM/uclass functions, * +320 bytes of static data, * +360 bytes of difference in non-DM/DM NS16550 drivers * +160 bytes memcpy(), strcmp(), * +144 bytes reset_cpu(), do_reset(), reset_misc() * etc, nothing outstanding.
I think that the total size of DM/uclass functions about 3KB is pretty tight, let it remain.
That is still a lot. Are you able to use Thumb on your board?
Yes, ARM core of LPC32xx has ARMv5TE architecture.
My board has a large page NAND device (Albert's board also has some large page NAND device I believe), so generally it is not a problem for me, if new SPL image is a bit larger, however I want to emphasize this in a commit message.
Albert, what do you think about the change? Do be you prefer to add CONFIG_SPL_SYS_MALLOC_SIMPLE=y to defconfigs?
I think it is better to do it in v2, plus I have to remove
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h b/arch/arm/include/asm/arch-lpc32xx/config.h index a9f057e..3b7f6bd 100644 --- a/arch/arm/include/asm/arch-lpc32xx/config.h +++ b/arch/arm/include/asm/arch-lpc32xx/config.h @@ -15,11 +15,6 @@
#define CONFIG_NR_DRAM_BANKS_MAX 2
-/* SPL build configuration */ -#if defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - /* UART configuration */ #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ (CONFIG_SYS_LPC32XX_UART == 7)
-- With best wishes, Vladimir