
Greetings,
I'm taking a look at moving imx8mm-venice to use binman for packaging. After doing so U-Boot proper fails to boot:
U-Boot SPL 2021.07-00475-g1126252f40 (Jul 15 2021 - 11:09:02 -0700) GSC : v58 0xf098 RST:VIN Thermal Protection Disabled Model : GW7300-00-B1B Serial : 852420 MFGDate : 10-26-2020 RTC : 122 PMIC : MP5416 DRAM : LPDDR4 1 GiB WDT: Not starting Trying to boot from MMC1 DTB : imx8mm-venice-gw73xx-0x
U-Boot 2021.07-00475-g1126252f40 (Jul 15 2021 - 11:09:02 -0700)
CPU: Freescale i.MX8MMQ rev1.0 1600 MHz (running at 1200 MHz) CPU: Industrial temperature grade (-40C to 105C) at 43C Reset cause: POR Model: Gateworks Venice GW73xx-0x i.MX8MM Development Kit DRAM: 1 GiB temp : 38.3C vdd_bat : 0.000V vdd_vin : 15.731V vdd_adc1: 0.000V vdd_adc2: 0.000V vdd_dram: 1.093V vdd_1p2 : 1.193V vdd_1p0 : 0.985V vdd_2p5 : 2.470V vdd_3p3 : 3.250V vdd_0p95: 0.948V vdd_1p8 : 1.799V vdd_gsc : 3.262V initcall sequence 000000007ffc4f58 failed at call 0000000040255910 (err=-2) ### ERROR ### Please RESET the board ###
Any ideas what this could be?
My patch in case I'm missing something obvious is: diff --git a/arch/arm/dts/imx8mm-venice-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-u-boot.dtsi index 42b2903f04..f738ea770e 100644 --- a/arch/arm/dts/imx8mm-venice-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-u-boot.dtsi @@ -6,6 +6,10 @@ #include "imx8mm-u-boot.dtsi"
/ { + binman: binman { + multiple-images; + }; + wdt-reboot { compatible = "wdt-reboot"; wdt = <&wdog1>; @@ -68,3 +72,101 @@ &wdog1 { u-boot,dm-spl; }; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + + blob_1: blob-ext@1 { + filename = "lpddr4_pmu_train_1d_imem.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_pmu_train_2d_imem.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + size = <0x4000>; + }; + }; + + flash { + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + itb { + filename = "u-boot.itb"; + + fit { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + fit,fdt-list = "of-list"; + + images { + uboot { + description = "U-Boot (64-bit)"; + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + + uboot_blob: blob-ext { + filename = "u-boot-nodtb.bin"; + }; + }; + + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x920000>; + entry = <0x920000>; + + atf_blob: blob-ext { + filename = "bl31.bin"; + }; + }; + + @fdt-SEQ { + description = "NAME"; + type = "flat_dt"; + compression = "none"; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + + @config-SEQ { + description = "NAME"; + firmware = "uboot"; + loadables = "atf"; + fdt = "fdt-SEQ"; + }; + }; + }; + }; +}; diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 78b6108ff5..71af1bd799 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -71,6 +71,7 @@ config TARGET_IMX8MM_ICORE_MX8MM
config TARGET_IMX8MM_VENICE bool "Support Gateworks Venice iMX8M Mini module" + select BINMAN select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 diff --git a/board/gateworks/venice/README b/board/gateworks/venice/README index 6a0ab1ef10..95e35c4734 100644 --- a/board/gateworks/venice/README +++ b/board/gateworks/venice/README @@ -25,10 +25,18 @@ $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . Build U-Boot ============ $ make imx8mm_venice_defconfig -$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000 +$ make CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000
Update eMMC =========== => tftpboot $loadaddr flash.bin => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 => mmc dev 2 && mmc write $loadaddr 0x42 $blkcnt +=> tftpboot $loadaddr u-boot.itb +=> setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 +=> mmc dev 2 && mmc write $loadaddr 0x300 $blkcnt + +Update uSD: +=========== +sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc +sudo dd if=u-boot.itb of=/dev/sd[x] bs=1024 seek=384 conv=sync diff --git a/board/gateworks/venice/imximage-8mm-lpddr4.cfg b/board/gateworks/venice/imximage-8mm-lpddr4.cfg new file mode 100644 index 0000000000..df3edb17ab --- /dev/null +++ b/board/gateworks/venice/imximage-8mm-lpddr4.cfg @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 Gateworks Corporation + */ + +#define __ASSEMBLY__ + +BOOT_FROM sd +LOADER mkimage.flash.mkimage 0x7E1000 diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 883be27cd7..c6c790734a 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -26,9 +26,9 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/gateworks/venice/imximage-8mm-lpddr4.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="gsc wd-disable" @@ -62,7 +62,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x imx8mm-venice-gw7901 imx8mm-venice-gw7902" +CONFIG_OF_LIST="imx8mm-venice imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x imx8mm-venice-gw73xx-0x imx8mm-venice-gw7901 imx8mm-venice-gw7902" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
A follow-on question is that I would like to investigate using binman in the SPL to dynamically access the IMX8M ddr training blobs so that we don't have to waste padding space taking them onto the end of the SPL which is currently done. The lpddr4 training blobs I'm using currently take up 57k without padding compared to 81k with padding. The location of them is handled in ddr_load_train_firmware.
If I add the following to my SPL: diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index d0a490b0e6..62eb67fa5e 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -3,6 +3,7 @@ * Copyright 2021 Gateworks Corporation */
+#include <binman_sym.h> #include <common.h> #include <cpu_func.h> #include <hang.h> @@ -252,6 +253,8 @@ static int power_init_board(void) return 0; }
+binman_sym_declare(ulong, blob_1, image_pos); + void board_init_f(ulong dummy) { struct udevice *dev; @@ -291,6 +294,8 @@ void board_init_f(ulong dummy) gpio_request(PCIE_RSTN, "perst#"); gpio_direction_output(PCIE_RSTN, 0);
+ printf("%s: blob_1:0x%0lx\n", __func__, binman_sym(ulong, blob_1, image_pos)); + /* GSC */ dram_sz = gsc_init(0);
I get 'blob_1:0x0' which is not what I expected.
If I understand correctly binman is using linker symbols to determine where things are in the image? What I don't quite understand is what symbols are valid to use assuming my dtsi above. The binman.rst docs talk use 'u_boot_any' as an example which apparently can match 'u-boot.bin', 'u-boot.img', and 'u-boot-nodtb.bin' but I can't find the code that somehow translates this meaning.
Best regards,
Tim