Add Common device tree fixup for NXP SoCs. Based on SoC and revision call pcie_layerscape or pcie_layerscape_gen4 fixup.
Signed-off-by: Wasim Khan wasim.khan@nxp.com --- drivers/pci/Makefile | 5 +++-- drivers/pci/pcie_layerscape_fixup.c | 5 +++-- drivers/pci/pcie_layerscape_fixup_common.c | 22 ++++++++++++++++++++++ drivers/pci/pcie_layerscape_fixup_common.h | 21 +++++++++++++++++++++ drivers/pci/pcie_layerscape_gen4_fixup.c | 7 ++++--- 5 files changed, 53 insertions(+), 7 deletions(-) create mode 100644 drivers/pci/pcie_layerscape_fixup_common.c create mode 100644 drivers/pci/pcie_layerscape_fixup_common.h
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index d6a9b8c..78820b6 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -33,9 +33,10 @@ obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o obj-$(CONFIG_PCIE_DW_MVEBU) += pcie_dw_mvebu.o obj-$(CONFIG_PCIE_FSL) += pcie_fsl.o pcie_fsl_fixup.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o -obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o +obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape_fixup.o pcie_layerscape_fixup_common.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie_layerscape_gen4.o \ - pcie_layerscape_gen4_fixup.o pcie_layerscape.o + pcie_layerscape_gen4_fixup.o pcie_layerscape.o \ + pcie_layerscape_fixup_common.o pcie_layerscape_fixup.o obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index e0dcd97..3d563d5 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -17,6 +17,7 @@ #include <asm/arch/clock.h> #endif #include "pcie_layerscape.h" +#include "pcie_layerscape_fixup_common.h"
#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -271,7 +272,7 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) }
/* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { struct ls_pcie *pcie;
@@ -284,7 +285,7 @@ void ft_pci_setup(void *blob, bd_t *bd) }
#else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls(void *blob, bd_t *bd) { } #endif diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c new file mode 100644 index 0000000..6f46363 --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.c @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + * + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/soc.h> +#include "pcie_layerscape_fixup_common.h" + +void ft_pci_setup(void *blob, bd_t *bd) +{ + uint svr; + + svr = SVR_SOC_VER(get_svr()); + + if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0)) + ft_pci_setup_ls_gen4(blob, bd); + else + ft_pci_setup_ls(blob, bd); +} diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h new file mode 100644 index 0000000..b24893e --- /dev/null +++ b/drivers/pci/pcie_layerscape_fixup_common.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + * + * Layerscape PCIe driver + */ +#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ +#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_ + +#include <common.h> + +void ft_pci_setup_ls(void *blob, bd_t *bd); +#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4 +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd); +#else +static void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) +{ +} +#endif + +#endif //_PCIE_LAYERSCAPE_FIXUP_COMMON_H_ diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c index fe478db..480d242 100644 --- a/drivers/pci/pcie_layerscape_gen4_fixup.c +++ b/drivers/pci/pcie_layerscape_gen4_fixup.c @@ -19,6 +19,7 @@ #include <asm/arch/clock.h> #endif #include "pcie_layerscape_gen4.h" +#include "pcie_layerscape_fixup_common.h"
#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2) /* @@ -37,7 +38,7 @@ static int ls_pcie_g4_next_streamid(struct ls_pcie_g4 *pcie) { int stream_id = pcie->stream_id_cur;
- if (stream_id > FSL_PEX_STREAM_ID_NUM) + if (stream_id > FSL_PEX_STREAM_ID_END) return -EINVAL;
pcie->stream_id_cur++; @@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie) }
/* Fixup Kernel DT for PCIe */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { struct ls_pcie_g4 *pcie;
@@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd) }
#else /* !CONFIG_OF_BOARD_SETUP */ -void ft_pci_setup(void *blob, bd_t *bd) +void ft_pci_setup_ls_gen4(void *blob, bd_t *bd) { } #endif