Update the tegra114 spi driver to support a live device tree.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/spi/tegra114_spi.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 86b1019585..013bc82380 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -12,7 +12,6 @@ #include <asm/arch/clock.h> #include <asm/arch-tegra/clk_rst.h> #include <spi.h> -#include <fdtdec.h> #include "tegra_spi.h"
DECLARE_GLOBAL_DATA_PTR; @@ -100,10 +99,8 @@ struct tegra114_spi_priv { static int tegra114_spi_ofdata_to_platdata(struct udevice *bus) { struct tegra_spi_platdata *plat = bus->platdata; - const void *blob = gd->fdt_blob; - int node = dev_of_offset(bus);
- plat->base = devfdt_get_addr(bus); + plat->base = dev_read_addr(bus); plat->periph_id = clock_decode_periph_id(bus);
if (plat->periph_id == PERIPH_ID_NONE) { @@ -113,10 +110,10 @@ static int tegra114_spi_ofdata_to_platdata(struct udevice *bus) }
/* Use 500KHz as a suitable default */ - plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", - 500000); - plat->deactivate_delay_us = fdtdec_get_int(blob, node, - "spi-deactivate-delay", 0); + plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", + 500000); + plat->deactivate_delay_us = dev_read_u32_default(bus, + "spi-deactivate-delay", 0); debug("%s: base=%#08lx, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n", __func__, plat->base, plat->periph_id, plat->frequency, plat->deactivate_delay_us);