25 Sep
2019
25 Sep
'19
6:12 p.m.
On 9/25/19 8:55 AM, Simon Glass wrote:
This reads the low cell of the PCI address from the wrong cell. Fix it. Also fix the function that this code came from.
Fixes: 9e51204527 (dm: core: Add operations on device tree references) Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT) Signed-off-by: Simon Glass sjg@chromium.org
I can't work out why the existing code is correct, but I suppose it might be for some obscure reason that needs a comment.
The original patch is here: http://patchwork.ozlabs.org/patch/525853/
This makes sense. I am not sure how the original code worked; I can only assume the mid/low values were always both set to 0, or unused, or something?
Tested-by: Stephen Warren swarren@nvidia.com