From: Icenowy Zheng icenowy@aosc.xyz
Allwinner V3s features a DRAM controller like the on in H3, but with a DDR2 DRAM.
Add support for it.
Signed-off-by: Icenowy Zheng icenowy@aosc.xyz --- arch/arm/mach-sunxi/Kconfig | 5 ++++- arch/arm/mach-sunxi/dram_sunxi_dw.c | 3 +++ 2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 1df24cfb39..af5cd6da9b 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -225,11 +225,13 @@ config SUNXI_DRAM_DDR2
choice prompt "DRAM Type and Timing" - default SUNXI_DRAM_DDR3_1333 + default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S + default SUNXI_DRAM_DDR2_V3S if MACH_SUN8I_V3S
config SUNXI_DRAM_DDR3_1333 bool "DDR3 1333" select SUNXI_DRAM_DDR3 + depends on !MACH_SUN8I_V3S ---help--- This option is the original only supported memory type, which suits many H3/H5/A64 boards available now. @@ -237,6 +239,7 @@ config SUNXI_DRAM_DDR3_1333 config SUNXI_DRAM_DDR2_V3S bool "DDR2 found in V3s chip" select SUNXI_DRAM_DDR2 + depends on MACH_SUN8I_V3S ---help--- This option is only for the DDR2 memory chip which is co-packaged in Allwinner V3s SoC. diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 438b4740cd..20c3055b7a 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -723,6 +723,9 @@ unsigned long sunxi_dram_init(void) uint16_t socid = SOCID_R40; /* Currently we cannot support R40 with dual rank memory */ para.dual_rank = 0; +#elif defined(CONFIG_MACH_SUN8I_V3S) + /* TODO: set delays and mbus priority for V3s */ + uint16_t socid = SOCID_H3; #elif defined(CONFIG_MACH_SUN50I) uint16_t socid = SOCID_A64; #elif defined(CONFIG_MACH_SUN50I_H5)