Hi Heiko,
I see with your patch the clock names, so fine... and see [1]
Hmm... I am on imx8mp, and I think the changes the patchset do in
"clk: imx8mn: Prevent clock critical path from disabling during reparent and set_rate"
are in clk-imx8mp already ...
Ported the patch from patchset
"[PATCH 05/26] clk: imx8mm: Mark IMX8MM_SYS_PLL2 and IMX8MM_SYS_PLL3 as enabled"
to imx8mp [2] and fec ethernet works again for me on imx8mp!
Could you add this if you post a v2 ?
TBH I don't feel like the below change is the correct one, it is too specific. The clock core is recursive and thus should handle the reparenting situations gracefully.
I posted a series that is targeting the LVDS output on imx8mp. You should probably consider checking these patches as well if you work on imx8mp as well. I also had similar breakages with Ethernet which happened during the assigned-clocks handling. This patch, which is more future and platform agnostic, fixed it:
https://lore.kernel.org/u-boot/20240910101344.110633-3-miquel.raynal@bootlin...
Yes, I also had such a "fix" first, before seeing Darios patchset!
Damn, I did not see your patches...
regarding your patch ... I am unsure which version is the best one ... I fear of side effects for other plattforms adding this change in generic "drivers/clk/clk-uclass.c" file...
FYI, this is the same approach as Linux. I don't expect any hardware related breakage, however if people have already tried to workaround the core's mistakes by doing more than expected in the SoC drivers, maybe we will observe issues.
My series is complimentary, even though there are some overlaps that we need to merge.
I try to find time to test them on my board!
Sure, let me know if you have troubles, it's still fresh :-) I will rework it a bit as it received already interesting feedback, and will note to Cc you (as well as Dario/Michael) in v2.
Thanks, Miquèl