Hi Michal,
On Fri, 2014-03-07 at 09:12 +0100, Michal Simek wrote:
On 03/05/2014 08:00 PM, Chin Liang See wrote:
On Wed, 2014-03-05 at 19:47 +0100, Michal Simek wrote:
Hi Pavel,
2014-03-05 17:13 GMT+01:00 Pavel Machek pavel@denx.de: Hi!
> Also I expect that you can change all pins for uarts/ethernets/spi/i2c/etc > that's why there is no golden configuration for socfpga that's why > it is better to keep it empty just to compile it. Well, there are some development boards around... and having u-boot able to boot on the devel board by default would be very very useful.I believe you but the point is somewhere else if you can reach it by universal
target.
> > At same time, these files are located inside board folders. If user have > > different boards, they will have new set of folders here their own > > handoff files. From there, there won't the need to regenerate everytime. > > Please explain me one thing how many users will use this configuration? > Especially these ~600 lines? Pretty much everyone when they test-boot their system...?Really? It means that all development boards/custom boards with socfpga
I believe you confuse with arch and board. These files are located inside board. For board/altera/socfpga, its referring to Altera dev kit. When another vendor, example like Xilinx, fabricated a board with SOCFPGA chip, then it will have another folder called board/xilinx/socfpga.
That explains a lot. Why isn't call devkit then?
Examples always nice when I explaining and I love examples. While the naming, it would be interesting topic which same as giving baby's name.
use the same configuration which seems to me weird.
If yes, then why these files are autogenerated if the same config can be use for all boards?
Probably an example will clear your doubt. When the board is fabricated, the pin mux used will be fixed. You won't need to change it until you fabricated a new board.
I understand that you want to have something which you can just compile and boot. But only pins are fixed not internal connection inside chip. Also I expect you have connectors on the board which you can use for add-on cards. My doubts are just based on my experience with zynq that not everything what it is generated by tools is really needed to get board boot. Also boards have just fixed pins but not internal connections to these pins. I believe that this is just the same for your dev kit. Also I hardly believe that you need all 600lines just to have something to boot.
Both SOCFPGA and Zynq are unique due to its programmability. But in this case, all our configurations here would only support golden system reference design on Altera dev kit. This would make our lives much easier.
Thanks Chin Liang
Thanks, Michal