
Hi Yann,
On Fri, 5 Oct 2012 14:09:53 +0200, Yann Vernier yann.vernier@orsoc.se wrote:
Changed CONFIG_SYS_TEXT_BASE to actual address (required for board_init_f) and moved it into cm4{008,1xx}.h, along with a warning that it must match CONFIG_SYS_FLASH_BASE (since lowlevel_init relocates there). lowlevel_init now uses CONFIG_SYS_RCS0_BASE to map ROM.
Changes for v2:
- Update to use CONFIG_SYS_FLASH_ constants only (no PHYS_FLASH)
- Use tabs where appropriate
- Update cm41xx also
- Explain the lowlevel_init change
Changes for v3:
- Use memory mappings per defined macros
- Change the final adjustment of lr and ip
- Verified mapping flash at 0x3000000 on KS8695X demo board
arch/arm/cpu/arm920t/ks8695/lowlevel_init.S | 63 +++++++++++++++++++-------- board/cm4008/config.mk | 1 - board/cm41xx/config.mk | 1 - 3 files changed, 45 insertions(+), 20 deletions(-)
diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S index 1bba571..74579ed 100644 --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S @@ -25,6 +25,7 @@ #include <config.h> #include <version.h> #include <asm/arch/platform.h> +#include <asm/arch/regvalues.h>
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
@@ -91,12 +92,31 @@ lowlevel_init: * remap the memory and flash regions. we want to end up with * ram from address 0, and flash at 32MB. */ +#if CONFIG_SYS_RCS0_BASE!=CONFIG_SYS_TEXT_BASE +#error CONFIG_SYS_RCS0_BASE and CONFIG_SYS_TEXT_BASE must match for highflash address to work
- /* Also needed for pointers in board_init_f() */
+#endif +#if CONFIG_SYS_RCS0_BASE>=KS8695_IO_BASE +#error Cannot relocate ROM past IO registers
- /* Firstly, the IO registers are at the top supported address.
Secondly, as we grow the ROM region it must not overlap the registers. */
+#endif +#if CONFIG_SYS_RCS0_BASE&0xffff +#error Cannot map memory to addresses not divisible by 64K +#endif ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
- ldr r2, =0xbfc00040
- /* The default ROM mapping is at 0x0 - 0x01ffffff.
Remap it to 0x0 - 0x03feffff so that it covers 0x02000000,
where CONFIG_SYS_FLASH_BASE maps it, as well as 0.
Relies on the limited address lines to repeat ROM images
on every multiple of the real ROM size. */
- ldr r2, =(KS8695_MEM_RANGE(0,0x03ff0000)|(CONFIG_KS8695_ROMCON0_VALUE&0xfff)) str r2, [r1] /* large flash map */
- ldr pc, =(highflash+0x02000000-0x00f00000) /* jump to high flash address */
- /* Relies on CONFIG_SYS_RCS0_BASE==CONFIG_SYS_TEXT_BASE */
- ldr pc, =(highflash) /* jump to high flash address */
highflash:
- ldr r2, =0x8fe00040
/* Move ROM to high address, and reconfigure to 4MiB size */
ldr r2, =CONFIG_KS8695_ROMCON0_VALUE str r2, [r1] /* remap flash range */
/*
@@ -105,28 +125,35 @@ highflash: * then you can have it all mapped nicely. Has no effect if you * only have a 4Mb or smaller flash. */ +#if CONFIG_SYS_RCS1_WIDTH ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1)
- ldr r2, =0x9fe40040
- ldr r2, =CONFIG_KS8695_ROMCON1_VALUE str r2, [r1] /* remap flash2 region, contiguous */
- ldr r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
- ldr r2, =0x30000005
- str r2, [r1] /* enable both flash selects */
+#endif
-#ifdef CONFIG_CM41xx /*
* map the second flash chip, using the external IO lines.
*/* map additional flash chip, using the external IO lines.
+#if CONFIG_SYS_ECS0_WIDTH ldr r1, =(KS8695_IO_BASE+KS8695_IO_CTRL0)
- ldr r2, =0xafe80b6d
- str r2, [r1] /* remap io0 region, contiguous */
- ldr r2, =CONFIG_KS8695_EXTACON0_VALUE
- str r2, [r1] /* map io0 region */
+#endif +#if CONFIG_SYS_ECS1_WIDTH ldr r1, =(KS8695_IO_BASE+KS8695_IO_CTRL1)
- ldr r2, =0xbfec0b6d
- str r2, [r1] /* remap io1 region, contiguous */
- ldr r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
- ldr r2, =0x30050005
- str r2, [r1] /* enable second flash */
- ldr r2, =CONFIG_KS8695_EXTACON1_VALUE
- str r2, [r1] /* map io1 region */
+#endif +#if CONFIG_SYS_ECS2_WIDTH
- ldr r1, =(KS8695_IO_BASE+KS8695_IO_CTRL2)
- ldr r2, =CONFIG_KS8695_EXTACON2_VALUE
- str r2, [r1] /* map io2 region */
#endif
- ldr r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
- ldr r2, =CONFIG_KS8695_ERGCON_VALUE
- str r2, [r1] /* enable relevant flash selects */
- /*
*/
- before relocating, we have to setup RAM timing
@@ -198,8 +225,8 @@ highflash: nobutton: #endif
- add lr, lr, #0x02000000 /* flash is now mapped high */
- add ip, ip, #0x02000000 /* this is a hack */
- add lr, lr, #CONFIG_SYS_TEXT_BASE /* flash is now mapped high */
- add ip, ip, #CONFIG_SYS_TEXT_BASE /* this is a hack */ mov pc, lr /* all done, return */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/board/cm4008/config.mk b/board/cm4008/config.mk deleted file mode 100644 index 0d5923b..0000000 --- a/board/cm4008/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00f00000 diff --git a/board/cm41xx/config.mk b/board/cm41xx/config.mk deleted file mode 100644 index 0d5923b..0000000 --- a/board/cm41xx/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00f00000
This seems to remove CONFIG_SYS_TEXT_BASE from config.mk files but does not put it elsewhere. How do the corresponding boards build once this patch is applied?
Amicalement,