On Thu, 2004-10-14 at 10:55, Fillod Stephane wrote:
Don't worry, we're used to these stages :) Can you please send me (or to the list) your patch for the ZBT SRAM?
Also a question for folks at freescale, according to u-boot/doc/README.mpc85xxads, where in the memory mapping the ZBT is supposed to be mapped (2MiB)?
Well, the local suggestion is 0xf840_0000 as part of the board register misc area at 0xf800_0000. Feel free to submit a patch with any localbus mods as needed. :-)
Note that in the currently released code, the LAW is setup with one gigundus 256M LAW, but the TLB is currently only mapping in 16K of the board register space.
Note that some compilers (GCC 2.95 and 3.3), or possibly some binutils variants(?) are known to have difficulty compiling (assembling) the TLB1_MAS2() and TLB1_MAS3() macros that span multiple lines in these init.S files. Feel free to rejoin the lines into longer ones for now. Official "feh".
jdl