Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
Chris Morgan macroalpha82@gmail.com 于2021年8月6日周五 上午12:49写道：
From: Chris Morgan macromorgan@hotmail.com
Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 for the Odroid Go Advance would no longer probe correctly, because setting the cpll and gpu clocks are not supported with the clk_px30 U-Boot driver. This adds support for setting the cpll clock to the clk_px30 driver. Another patch will update the U-Boot specific device-tree to remove the GPU clock which is not used by U-Boot.
Signed-off-by: Chris Morgan macromorgan@hotmail.com
drivers/clk/rockchip/clk_px30.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index 6b746f4c65..89784f9aa1 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -1262,6 +1262,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate) case PLL_NPLL: ret = px30_clk_set_pll_rate(priv, NPLL, rate); break;
case PLL_CPLL:ret = px30_clk_set_pll_rate(priv, CPLL, rate);break; case ARMCLK: ret = px30_armclk_set_clk(priv, rate); break;-- 2.25.1