On Fri, Mar 10, 2017 at 9:53 AM, Marek Vasut marex@denx.de wrote:
On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
Convert Altera ddr driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
drivers/Kconfig | 2 ++ drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 ++++++ include/configs/socfpga_common.h | 5 ----- 4 files changed, 9 insertions(+), 5 deletions(-) create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig
diff --git a/drivers/Kconfig b/drivers/Kconfig index 0e5d97d..3e6bbac 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig"
source "drivers/crypto/Kconfig"
+source "drivers/ddr/Kconfig"
source "drivers/demo/Kconfig"
source "drivers/ddr/fsl/Kconfig" diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig new file mode 100644 index 0000000..b764add --- /dev/null +++ b/drivers/ddr/Kconfig @@ -0,0 +1 @@ +source "drivers/ddr/altera/Kconfig" diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig new file mode 100644 index 0000000..9554da7 --- /dev/null +++ b/drivers/ddr/altera/Kconfig @@ -0,0 +1,6 @@ +config ALTERA_SDRAM
bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices"Does this controller even support SDRAM ? :)
The existing DDR driver is for Gen5 only. We will have new DDR driver for Arria 10 in later patchset.
default y if TARGET_SOCFPGA_GEN5helpThis is for building the SDRAM controller for the Arria5/Cyclone5devices.diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 55e0bf9..bc92a2c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -77,11 +77,6 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
/*
- SDRAM controller
- */
-#define CONFIG_ALTERA_SDRAM
-/*
- EPCS/EPCQx1 Serial Flash Controller
*/ #ifdef CONFIG_ALTERA_SPI
Regards Ley Foon