-----Original Message----- From: Yinbo Zhu yinbo.zhu@nxp.com Sent: Tuesday, October 15, 2019 2:51 PM To: Wolfgang Denk wd@denx.de; Priyanka Jain priyanka.jain@nxp.com; Shengzhou Liu shengzhou.liu@nxp.com; u-boot@lists.denx.de Cc: Yinbo Zhu yinbo.zhu@nxp.com; Xiaobo Xie xiaobo.xie@nxp.com; Jiafei Pan jiafei.pan@nxp.com; Prabhakar X prabhakar.kushwaha@nxp.com; Bin Meng bmeng.cn@gmail.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Adam Ford aford173@gmail.com; Patrick Delaunay patrick.delaunay@st.com; Jeremy Gebben jgebben@sweptlaser.com; Joe Hershberger joe.hershberger@ni.com; Y.b. Lu yangbo.lu@nxp.com Subject: [PATCH v3 01/20] arch: powerpc: add eSDHC node to p1020 dts
Add eSDHC node to p1020 dts
Signed-off-by: Yinbo Zhu yinbo.zhu@nxp.com
arch/powerpc/dts/p1020-post.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020- post.dtsi index 1e5e678..fb3b203 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -24,6 +24,13 @@ single-cpu-affinity; last-interrupt-source = <255>; };
- esdhc: esdhc@2e000 {
compatible = "fsl,esdhc";reg = <0x2e000 0x1000>;/* Filled in by U-Boot */clock-frequency = <0>;- };
};
/* PCIe controller base address 0x9000 */
2.9.5
Travis reports error with this series: https://travis-ci.org/p-priyanka-jain/u-boot-fsl-qoriq/builds/601133375 Kindly fix. Putting the series for merge on-hold till then
--priyankajain