14 Feb
2020
14 Feb
'20
11:26 a.m.
Hi,
From: Patrick DELAUNAY patrick.delaunay@st.com Sent: mardi 28 janvier 2020 10:11
From: Antonio Borneo antonio.borneo@st.com
LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead cache the value at probe and pretend to use it later.
Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.
Signed-off-by: Antonio Borneo antonio.borneo@st.com Signed-off-by: Patrick Delaunay patrick.delaunay@st.com
Applied to u-boot-stm32/master, thanks!
Regards Patrick