My 'fix' as it is now, doesn't fix any real problem. It's not finished yet. As it looks now, it makes the JTAG connection unreliable. Data is getting corrupted when it's read or written. However, the system no longer hangs up itself.
That IS a progress.
Progress is made, but no completely working solution is found yet.
I've just found out that registers hw_clkctrl_frac0 and hw_clkctrl_frac1 should be accessed as bytes only. It's in the manual (page 886 and 887), but I completely missed that the first 10 times. We access hw_clkctrl_frac0 as a word, though I doubt if this has any serious consequences.
I will post a patch when I've found a working solution. It's in my best interest to have it tested and reviewed by you guys, as you understand the clock tree of this SoC a lot better than I. Besides that, I'd like to have it in the mainline as well, so we don't have to maintain our patches.
But we can also test and review the current solution ;-)
I hope I can offer a patch up for review later today, but definitely before the end of the week.