[U-Boot] [PATCH v5 09/13] aspeed: ast2500: fix missing break in D2PLL clock enablement

Signed-off-by: Cédric Le Goater clg@kaod.org Reviewed-by: Joel Stanley joel@jms.id.au Reviewed-by: Simon Glass sjg@chromium.org Acked-by: Joe Hershberger joe.hershberger@ni.com --- drivers/clk/aspeed/clk_ast2500.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index 526470051c5d..2182320f607f 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -411,6 +411,7 @@ static int ast2500_clk_enable(struct clk *clk) break; case PLL_D2PLL: ast2500_configure_d2pll(priv->scu, D2PLL_DEFAULT_RATE); + break; default: return -ENOENT; }