On 11/17/2016 01:39 AM, Priyanka Jain wrote:
From: Priyanka Jain priyanka.jain@nxp.com
Enable DDR hashing for DDR performance optimization on LS2088A which has DDR controller version 5.2.1
Signed-off-by: Priyanka Jain priyanka.jain@nxp.com
board/freescale/ls2080aqds/ddr.c | 5 +++++ board/freescale/ls2080ardb/ddr.c | 5 +++++ 2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index 9c6f477..473dd7c 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -8,6 +8,7 @@ #include <fsl_ddr_sdram.h> #include <fsl_ddr_dimm_params.h> #include <asm/arch/soc.h> +#include <fsl_ddr.h> #include "ddr.h"
DECLARE_GLOBAL_DATA_PTR; @@ -134,6 +135,10 @@ found: /* Enable ZQ calibration */ popts->zq_en = 1;
- /* Enable DDR hashing */
- if (fsl_ddr_get_version(0) == 0x50201)
popts->addr_hash = 1;
We already have this option. You simply need to set it in hwconfig.
York