Re: [U-Boot] [PATCH 6/6] mx6: soc: Disable VDDPU regulator

On Tue, Dec 24, 2013 at 1:30 PM, Ranjani.Vaidyanathan@freescale.com Ranjani.Vaidyanathan@freescale.com wrote:

Hi Fabio,

The PU power-up/power-down sequence has specific steps, includes some clock management. Please refer to the kernel code for the sequence.

Thanks for the review, Ranjani.

Just sent v2 that disables vddpu in the same way as in kernel.

Regards,

Fabio Estevam