As of u-boot version 2013.07 the header include/configs/sbc8349.h contained
#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET
and the source file drivers/i2c/fsl_i2c.c contained
static const struct fsl_i2c *i2c_dev[2] = { (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET), #ifdef CONFIG_SYS_I2C2_OFFSET (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET) #endif };
with CONFIG_SYS_SPD_BUS_NUM defaulting to 0. Therefore, the second I2C interface is used for the SPD. Since changes to the I2C code the current HEAD of the repository has, in the source file drivers/i2c/i2c_core.c
void i2c_init_all(void) { i2c_init_board(); i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); return; }
where CONFIG_SYS_SPD_BUS_NUM again defaults to 0 but due to the changes in the source file drivers/i2c/fsl_i2c.c which contains
/* * Register fsl i2c adapters */ U_BOOT_I2C_ADAP_COMPLETE(fsl_0, fsl_i2c_init, fsl_i2c_probe, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE, 0) #ifdef CONFIG_SYS_FSL_I2C2_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_1, fsl_i2c_init, fsl_i2c_probe, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, CONFIG_SYS_FSL_I2C2_SPEED, CONFIG_SYS_FSL_I2C2_SLAVE, 1) #endif
the code will now incorrectly use the first I2C interface for the SPD. The following patch would fix the sbc8349 board.
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diff -Naur u-boot-2013.07-196-gcdce889/include/configs/sbc8349.h u-boot-2013.07-196-gcdce889-fix-sbc8349/include/configs/sbc8349.h --- u-boot-2013.07-196-gcdce889/include/configs/sbc8349.h 2013-08-13 17:11:25.000000000 -0400 +++ u-boot-2013.07-196-gcdce889-fix-sbc8349/include/configs/sbc8349.h 2013-08-15 15:18:35.000000000 -0400 @@ -297,7 +297,7 @@ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69}, {1, 0x69} } -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ +#define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */
/* TSEC */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000
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