Add selection of NAND flash pins to the funcmux.
Signed-off-by: Simon Glass sjg@chromium.org Acked-by: Stephen Warren swarren@nvidia.com ---
arch/arm/cpu/armv7/tegra2/funcmux.c | 7 +++++++ arch/arm/include/asm/arch-tegra2/funcmux.h | 3 +++ 2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c b/arch/arm/cpu/armv7/tegra2/funcmux.c index c1d2dfe..8931d5e 100644 --- a/arch/arm/cpu/armv7/tegra2/funcmux.c +++ b/arch/arm/cpu/armv7/tegra2/funcmux.c @@ -169,6 +169,13 @@ int funcmux_select(enum periph_id id, int config) } break;
+ case PERIPH_ID_NDFLASH: + if (config == FUNCMUX_NDFLASH_ATC) { + pinmux_set_func(PINGRP_ATC, PMUX_FUNC_NAND); + pinmux_tristate_disable(PINGRP_ATC); + } + break; + default: debug("%s: invalid periph_id %d", __func__, id); return -1; diff --git a/arch/arm/include/asm/arch-tegra2/funcmux.h b/arch/arm/include/asm/arch-tegra2/funcmux.h index ae73c72..9419522 100644 --- a/arch/arm/include/asm/arch-tegra2/funcmux.h +++ b/arch/arm/include/asm/arch-tegra2/funcmux.h @@ -47,6 +47,9 @@ enum { FUNCMUX_SDMMC4_ATC_ATD_8BIT = 0, FUNCMUX_SDMMC4_ATB_GMA_4_BIT, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT, + + /* NAND flags */ + FUNCMUX_NDFLASH_ATC = 0, };
/**