In message 7EA18FDD2DC2154AA3BD6D2F22A62A0E0D2F42@zch01exm23.fsl.freescale.net you wrote:
mpc7448 processor is BIG ENDIAN, while the tsi108 bridge connects the flash chip by little ENDIA mode. When I set __LITTLE_ENDIA in the cfi_flash driver, everything seems OK, but the written bytes are swapped (see the following log). Now, It seems that if I define CFG_FLASH_USE_BUFFER_WRITE in my config file, this issue can be solved. I will do more test on my board. While, how can I set __LITTLE_ENDIA mode for cfi_driver file in a BIG ENDIA system?
Please check your keyboard; the 'N' key seems to fail quite often.
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB 16 MB
...
=> fli
Bank # 1: CFI conformant FLASH (32 x 16) Size: 16 MB in 128 Sectors Erase timeout 16384 ms, write timeout 1 ms, buffer write timeout 5 ms, buffer size 32
Stop. What's this. First we see a report of "Unknown FLASH on Bank 1", and that the size has been set to 0, and here we get different information?
Sector Start Addresses: FF000000 FF020000 FF040000 FF060000 FF080000
...
FFFA0000 FFFC0000 FFFE0000Bank # 2: missing or unknown FLASH type
And what's this about Bank # 2???
This seems to be a bug. Please fix this first.
=> md ff000000 ff000000: 27051956 552d426f 6f742031 2e312e34 '..VU-Boot 1.1.4 ff000010: 2d673230 38653063 38312d64 69727479 -g208e0c81-dirty
...
=> cp.b ff000000 fff80000 20000 Copy to Flash... done
So you are copying some area within the *same* memory device (your flash memory)...
=> md fff80000 fff80000: 56190527 6f422d55 3120746f 342e312e V..'oB-U1 to4.1. fff80010: 3032672d 63306538 642d3138 79747269 02g-c0e8d-18ytri
You read from memory, write to the same memory device, and read the written data back from the same memory device, and find the data to be swapped?
That would mean that reading and writing memory use different byte order. If this is true, then you're screwed.
Best regards,
Wolfgang Denk