On 11/8/24 07:35, Venkatesh Yadav Abbarapu wrote:
As the flash reset is handled in spi nor core, removing the flash reset functionality. As the configuration like tristate and hysterisis need to be enabled by the cdo. Handle the flash reset only for mini u-boot case.
Rename the "cadence_qspi_versal_flash_reset" to generic name "cadence_qspi_flash_reset" as this can be used by other platforms as well.
Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Rename the cadence_qspi_versal_flash_reset to cadence_qspi_flash_reset.
- Add the DM_GPIO flag in the paltform specific file.
drivers/spi/cadence_ospi_versal.c | 45 ++----------------------------- drivers/spi/cadence_qspi.c | 6 +++-- 2 files changed, 6 insertions(+), 45 deletions(-)
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 222f828f54..dcf28c7559 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -125,49 +125,8 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv) return 0; }
-#if defined(CONFIG_DM_GPIO) -int cadence_qspi_versal_flash_reset(struct udevice *dev) -{
- struct gpio_desc gpio;
- u32 reset_gpio;
- int ret;
- /* request gpio and set direction as output set to 1 */
- ret = gpio_request_by_name(dev, "reset-gpios", 0, &gpio,
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);- if (ret) {
printf("%s: unable to reset ospi flash device", __func__);return ret;- }
- reset_gpio = PMIO_NODE_ID_BASE + gpio.offset;
- /* Request for pin */
- xilinx_pm_request(PM_PINCTRL_REQUEST, reset_gpio, 0, 0, 0, NULL);
- /* Enable hysteresis in cmos receiver */
- xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio,
PM_PINCTRL_CONFIG_SCHMITT_CMOS,PM_PINCTRL_INPUT_TYPE_SCHMITT, 0, NULL);- /* Disable Tri-state */
- xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio,
PM_PINCTRL_CONFIG_TRI_STATE,PM_PINCTRL_TRI_STATE_DISABLE, 0, NULL);- udelay(1);
- /* Set value 0 to pin */
- dm_gpio_set_value(&gpio, 0);
- udelay(1);
- /* Set value 1 to pin */
- dm_gpio_set_value(&gpio, 1);
- udelay(1);
- return 0;
-} -#else -int cadence_qspi_versal_flash_reset(struct udevice *dev) +#if !CONFIG_IS_ENABLED(DM_GPIO) +int cadence_qspi_flash_reset(struct udevice *dev) { /* CRP WPROT */ writel(0, WPROT_CRP); diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 9c466f8695..c8d640f068 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -33,7 +33,7 @@ __weak int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, return 0; }
-__weak int cadence_qspi_versal_flash_reset(struct udevice *dev) +__weak int cadence_qspi_flash_reset(struct udevice *dev) { return 0; } @@ -259,7 +259,9 @@ static int cadence_spi_probe(struct udevice *bus) priv->read_delay = -1;
/* Reset ospi flash device */
- return cadence_qspi_versal_flash_reset(bus);
return cadence_qspi_flash_reset(bus);
return 0; }
static int cadence_spi_remove(struct udevice *dev)
Applied. M