Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Wolfgang Denk wd@denx.de --- .../arch/arm/include/asm/arch-mx25/imx-regs.h | 11 ++++++++++- .../arch/arm/include/asm/arch-mx31/imx-regs.h | 12 ++++++++++++ .../arch/arm/include/asm/arch-mx35/imx-regs.h | 12 ++++++++++++ .../arch/arm/include/asm/arch-mx5/imx-regs.h | 16 +++++++++++++++- 4 files changed, 49 insertions(+), 2 deletions(-)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx25/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx25/imx-regs.h index b7b4d07..654f9e8 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx25/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -131,10 +131,19 @@ struct iim_regs { };
struct fuse_bank0_regs { - u32 fuse0_25[0x1a]; + u32 fuse0_7[8]; + u32 uid[8]; + u32 fuse16_25[0xa]; u32 mac_addr[6]; };
+struct fuse_bank1_regs { + u32 fuse0_21[0x16]; + u32 usr5; + u32 fuse23_29[7]; + u32 usr6[2]; +}; + /* Multi-Layer AHB Crossbar Switch (MAX) registers */ struct max_regs { u32 mpr0; diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx31/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx31/imx-regs.h index c2db85f..00b347f 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx31/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -103,6 +103,18 @@ struct iim_regs { } bank[3]; };
+struct fuse_bank0_regs { + u32 fuse0_5[6]; + u32 usr; + u32 fuse7_15[9]; +}; + +struct fuse_bank2_regs { + u32 fuse0; + u32 uid[8]; + u32 fuse9_15[7]; +}; + struct iomuxc_regs { u32 unused1; u32 unused2; diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/imx-regs.h index f75e5c2..1d1be2d 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -295,6 +295,18 @@ struct iim_regs { } bank[3]; };
+struct fuse_bank0_regs { + u32 fuse0_7[8]; + u32 uid[8]; + u32 fuse16_31[0x10]; +}; + +struct fuse_bank1_regs { + u32 fuse0_21[0x16]; + u32 usr; + u32 fuse23_31[9]; +}; + /* General Purpose Timer (GPT) registers */ struct gpt_regs { u32 ctrl; /* control */ diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h index 33d2097..8ac3fac 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -499,8 +499,14 @@ struct iim_regs { };
struct fuse_bank0_regs { - u32 fuse0_23[24]; + u32 fuse0_7[8]; + u32 uid[8]; + u32 fuse16_23[8]; +#if defined(CONFIG_MX51) + u32 imei[8]; +#elif defined(CONFIG_MX53) u32 gp[8]; +#endif };
struct fuse_bank1_regs { @@ -509,6 +515,14 @@ struct fuse_bank1_regs { u32 fuse15_31[0x11]; };
+#if defined(CONFIG_MX53) +struct fuse_bank4_regs { + u32 fuse0_4[5]; + u32 gp[3]; + u32 fuse8_31[0x18]; +}; +#endif + #endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */