
6 Jul
2009
6 Jul
'09
7:39 p.m.
Hi all,
I've made ports of u-boot for two powerpc processors, MPC8343 and MPC8541.
The boards has 128MB of DDR2. So I enabled CFG_DRAM_TEST in 127MB of those memories, and I got two scenarios:
MPC8343(ddr_clk = 264 MHz): test tooks 1min 35sec
MPC8541(ddr_clk = 333 MHz): test tooks 5 sec
Note: memories get ddr_clk / 2
Make sense? Is this cause MPC85xx family has L2 cache? Or cause ddr_clk? Or my port has problems in DDR configuration?
Im using Micron DDR2 memory, MT47H32M16HR-3:F, with CL = 3 for both ports.
Thanks in advance,
-- Alemao