On Wednesday 19 November 2008, Steven A. Falco wrote:
The bits in ppc440.h for the SDR0_DDRCFG register are incorrect. The register is numbered in big-endian mode, so for example, the LT2 bit (bit 23) should be represented as 0x00000100 rather than 0x01000000.
Those defines are not used anywhere currently. So I would really prefer to remove those defines completely. A patch for this would be really appreciated. Thanks.
Please note that all 4xx-SDRAM related defines should be placed in include/asm-ppc/ppc4xx-sdram.h now.
Thanks.
Best regards, Stefan
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