
On 10.01.2018 21:26, Álvaro Fernández Rojas wrote:
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
v7: Introduce changes suggested by Jagan Teki:
- Remove wait_for_bit and update callers to wait_for_bit_le32.
arch/arm/mach-imx/mx6/ddr.c | 22 ++++----- arch/arm/mach-socfpga/clock_manager.c | 4 +- arch/arm/mach-socfpga/clock_manager_gen5.c | 8 ++-- arch/arm/mach-socfpga/reset_manager_arria10.c | 36 +++++++-------- arch/mips/mach-ath79/ar934x/clk.c | 2 +- board/samtec/vining_2000/vining_2000.c | 4 +- drivers/clk/clk_pic32.c | 12 ++--- drivers/clk/renesas/clk-rcar-gen3.c | 4 +- drivers/ddr/microchip/ddr2.c | 8 ++-- drivers/fpga/socfpga_arria10.c | 17 +++---- drivers/mmc/msm_sdhci.c | 8 ++-- drivers/mtd/pic32_flash.c | 4 +- drivers/net/ag7xxx.c | 16 +++---- drivers/net/dwc_eth_qos.c | 17 +++---- drivers/net/ethoc.c | 8 ++-- drivers/net/pic32_eth.c | 12 ++--- drivers/net/pic32_mdio.c | 28 ++++++------ drivers/net/ravb.c | 4 +- drivers/net/xilinx_axi_emac.c | 4 +- drivers/net/zynq_gem.c | 12 ++--- drivers/reset/sti-reset.c | 4 +- drivers/serial/serial_pic32.c | 4 +- drivers/spi/atmel_spi.c | 4 +- drivers/spi/cadence_qspi_apb.c | 14 +++--- drivers/spi/fsl_qspi.c | 20 ++++----- drivers/spi/mvebu_a3700_spi.c | 20 +++++---- drivers/usb/host/dwc2.c | 24 +++++----- drivers/usb/host/ehci-msm.c | 3 +- drivers/usb/host/ehci-mx6.c | 5 +-- drivers/usb/host/ohci-lpc32xx.c | 12 ++--- drivers/usb/host/xhci-rcar.c | 12 ++--- drivers/video/atmel_hlcdfb.c | 64 +++++++++++++-------------- 32 files changed, 207 insertions(+), 209 deletions(-)
Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com
nits below
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index dc743e113d..a39f9c5c86 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -222,8 +222,8 @@ static int ravb_reset(struct udevice *dev) writel(CCC_OPC_CONFIG, eth->iobase + RAVB_REG_CCC);
/* Check the operating mode is changed to the config mode. */
- return wait_for_bit(dev->name, (void *)eth->iobase + RAVB_REG_CSR,
CSR_OPS_CONFIG, true, 100, true);
- return wait_for_bit_le32((void *)eth->iobase + RAVB_REG_CSR,
CSR_OPS_CONFIG, true, 100, true);
the cast to (void *) is not necessary anymore
}
static void ravb_base_desc_init(struct ravb_priv *eth) diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 9a2a578ff9..55fa1e49d5 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -366,8 +366,8 @@ static int axi_ethernet_init(struct axidma_priv *priv) * processor mode and hence bypass in this mode */ if (!priv->eth_hasnobuf) {
err = wait_for_bit(__func__, (const u32 *)®s->is,
XAE_INT_MGTRDY_MASK, true, 200, false);
err = wait_for_bit_le32((const u32 *)®s->is,
XAE_INT_MGTRDY_MASK, true, 200, false);
the cast to (const u32 *) is not necessary anymore
if (err) { printf("%s: Timeout\n", __func__); return 1;