Configure the parent clock of wiz3_pll0_refclk to the internal clock required for USB3 to be functional and also remove "ti,usb2-only" property as it now supports USB3 mode. This has properties specific to u-boot on top of DT present in v5.13 of Linux Kernel.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com Signed-off-by: Vignesh Raghavendra vigneshr@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- .../k3-j721e-common-proc-board-u-boot.dtsi | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 974dae8416..85dbf8d2ac 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -129,13 +129,17 @@ u-boot,dm-spl; };
+&wiz3_pll1_refclk { + assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; + assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; +}; + &main_usbss0_pins_default { u-boot,dm-spl; };
&usbss0 { u-boot,dm-spl; - ti,usb2-only; };
&usb0 { @@ -215,3 +219,16 @@ &main_r5fss1 { ti,cluster-mode = <0>; }; + +&wiz3_pll1_refclk { + assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; + assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; +}; + +&serdes_ln_ctrl { + u-boot,mux-autoprobe; +}; + +&usb_serdes_mux { + u-boot,mux-autoprobe; +};