On 9/15/23 06:50, Tejas Bhumkar wrote:
Current code expects bridge phy address at 0 which is not correct expectation because bridge phy address is configurable. That's why update the code to read reg property to figure it out where bridge is and use it in phy creation code.
Signed-off-by: Michal Simek michal.simek@amd.com Signed-off-by: Tejas Bhumkar tejas.arvind.bhumkar@amd.com
drivers/net/phy/phy.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index ae21acb059..d64a83b83d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -838,7 +838,10 @@ static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus, ofnode_for_each_subnode(node, dev_ofnode(dev)) { node = ofnode_by_compatible(node, "xlnx,gmii-to-rgmii-1.0"); if (ofnode_valid(node)) {
phydev = phy_device_create(bus, 0,
int gmiirgmii_phyaddr;gmiirgmii_phyaddr = ofnode_read_u32_default(node, "reg", 0);phydev = phy_device_create(bus, gmiirgmii_phyaddr, PHY_GMII2RGMII_ID, false); if (phydev) phydev->node = node;
Applied. M