Re: [U-Boot] [PATCH] AM33xx: Fix bad addressing in PLL dividers setting

On Sat, Jun 29, 2019 at 10:47:08PM +0200, Martin Devera wrote:

Original code aborts always. The bug was unnoticed probably because 'if' condition was never met. when using xtal frequency 25MHz, it blows up.

Signed-off-by: Martin Devera devik@eaxlabs.cz

arch/arm/mach-omap2/am33xx/clock.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c index 3d17698e18..a042c8da0f 100644 --- a/arch/arm/mach-omap2/am33xx/clock.c +++ b/arch/arm/mach-omap2/am33xx/clock.c @@ -20,15 +20,15 @@ static void setup_post_dividers(const struct dpll_regs *dpll_regs, { /* Setup post-dividers */ if (params->m2 >= 0)

• writel(params->m2, dpll_regs->cm_div_m2_dpll);
  

• writel(params->m2, &dpll_regs->cm_div_m2_dpll);
  

  if (params->m3 >= 0)

• writel(params->m3, dpll_regs->cm_div_m3_dpll);
  

• writel(params->m3, &dpll_regs->cm_div_m3_dpll);
  

  if (params->m4 >= 0)

• writel(params->m4, dpll_regs->cm_div_m4_dpll);
  

• writel(params->m4, &dpll_regs->cm_div_m4_dpll);
  

  if (params->m5 >= 0)

• writel(params->m5, dpll_regs->cm_div_m5_dpll);
  

• writel(params->m5, &dpll_regs->cm_div_m5_dpll);
  

  if (params->m6 >= 0)

• writel(params->m6, dpll_regs->cm_div_m6_dpll);
  

• writel(params->m6, &dpll_regs->cm_div_m6_dpll);
  

}

static inline void do_lock_dpll(const struct dpll_regs *dpll_regs)

This causes my AM335x GP EVM to fail to boot (no output at all in SPL).