Hi all,
Im using a Freescale QorIQ P1020 custom board, booting from serial NOR flash (SPI), U-Boot 2014.10.
It was everything OK, then I enabled POST memory test in my config file:
#define CONFIG_POST CONFIG_SYS_POST_MEMORY
When booting, the output is:
----- U-Boot 2014.10-00006-gc81dc6b-dirty (Dec 22 2014 - 13:50:34)
CPU0: P1020, Version: 1.1, (0x80e40011) Core: e500, Version: 5.1, (0x80212051) Clock Configuration: CPU0:800 MHz, CPU1:800 MHz, CCB:400 MHz, DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:100 MHz L1: D-cache 32 KiB enabled I-cache 32 KiB enabled Board: P1020 Custom Board I2C: ready SPI: ready DRAM: Testing 0x00000000 - 0x3fffffff Remap DDR 1 GiB (DDR3, 32-bit, CL=5, ECC on) POST memory PASSED L2: 256 KiB enabled ... -----
For a lot of u-boot commands (including booting Linux), everything works fine. But when I execute "version" command I got this error:
----- Bad trap at PC: a8fffffc, SR: 29200, vector=e00 NIP: A8FFFFFC XER: 20000000 LR: A8FFFFFF REGS: 3ef2dc00 TRAP: 0e00 DAR: 00000000 MSR: 00029200 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: A8FFFFFF 3EF2DCF0 3EF2DF14 000003FD 0000000A FFFFFFFF FFFFFFFF 000000FF GPR08: 00000020 00000020 00000020 3EF2DCF0 3FF4F634 C9B5A0DA 3FFF05D4 3EF31A10 GPR16: 3FF8E6E8 3FF8E004 3EF31A10 3EF31A00 3EF31A30 00000000 00000000 00000000 GPR24: 00000000 3FFF0498 00000001 3EF31A10 00000000 ACFFFFFF ABFFFFFF AAFFFFFF Call backtrace: Exception in kernel pc a8fffffc signal 0 ### ERROR ### Please RESET the board ### -----
Im afraid that this test is hiding another errors, because its testing the whole DDR range. And in post/tests.c the flag POST_ROM is set, but booting from NOR flash SPI we are in DDR since the beginning.
Any ideas?
Cheers,
-- Allan