22 Mar
2013
22 Mar
'13
9:54 p.m.
Dear York Sun,
In message 1363973052-25918-3-git-send-email-yorksun@freescale.com you wrote:
From: Tang Yuantian Yuantian.Tang@freescale.com
For T4/B4, the clockgen node compatible string is updated to version 2. Add clock-frequency setting for this new version.
Signed-off-by: Tang Yuantian Yuantian.Tang@freescale.com
arch/powerpc/cpu/mpc85xx/fdt.c | 2 ++ 1 file changed, 2 insertions(+)
CHECK: Alignment should match open parenthesis #125: FILE: arch/powerpc/cpu/mpc85xx/fdt.c:667: + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
Best regards,
Wolfgang Denk
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DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
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