
hello david,
I have a patch to boot on a cf card for at91rm9200dk It's just for doing some tests so it is not a "proper" patch : some defines to put in a correct file...
regards,
Yann
David A. Peters a écrit :
Does U-Boot have PCMCIA support for the AT91RM9200?
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diff -uNrp u-boot-1.1.1-ori/board/at91rm9200dk/at91rm9200dk.c u-boot-1.1.1/board/at91rm9200dk/at91rm9200dk.c --- u-boot-1.1.1-ori/board/at91rm9200dk/at91rm9200dk.c Thu Sep 11 21:49:01 2003 +++ u-boot-1.1.1/board/at91rm9200dk/at91rm9200dk.c Tue Sep 7 10:29:49 2004 @@ -112,3 +115,69 @@ void nand_init (void) printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20); } #endif + + + + +/* YD Pcmcia initialization. + * Todo: ajouter les define dans un .h propre.... + */ +#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +#define AT91C_ID_PIOB ( 3) +#define AT91C_ID_PIOC ( 4) +#define AT91C_PIO_PC6 (1 << 6) +#define AT91C_PC6_NWAIT (AT91C_PIO_PC6) +#define AT91C_PIO_PC7 (1 << 7) +#define AT91C_PC7_A23 (AT91C_PIO_PC7) +#define AT91C_PIO_PC9 (1 << 9) +#define AT91C_PC9_A25_CFRNW (AT91C_PIO_PC9) +#define AT91C_PIO_PC10 (1 << 10) +#define AT91C_PC10_NCS4_CFCS (AT91C_PIO_PC10) +#define AT91C_PIO_PC11 (1 << 11) +#define AT91C_PC11_NCS5_CFCE1 (AT91C_PIO_PC11) +#define AT91C_PIO_PC12 (1 << 12) +#define AT91C_PC12_NCS6_CFCE2 (AT91C_PIO_PC12) +#define AT91C_PIO_PB0 (1 << 0) +#define AT91C_CF_PB0_CD1 AT91C_PIO_PB0 +#define AT91C_PIO_PC5 (1 << 5) +#define AT91C_CF_PC5_RESET AT91C_PIO_PC5 +#define AT91C_EBI_CS4A_SMC_COMPACTFLASH (0x1 << 4) +#define AT91C_SMC2_DBW_16 (0x1 << 13) +#define AT91C_SMC2_BAT (0x1 << 12) +#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) + +int at91_pcmcia_low_level_init() +{ + + *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB; + *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC; + + /* Set up pio */ + *AT91C_PIOC_PDR = AT91C_PC6_NWAIT | AT91C_PC7_A23 | AT91C_PC9_A25_CFRNW | AT91C_PC10_NCS4_CFCS | AT91C_PC11_NCS5_CFCE1 | AT91C_PC12_NCS6_CFCE2; + *AT91C_PIOC_ASR = AT91C_PC6_NWAIT | AT91C_PC7_A23 | AT91C_PC9_A25_CFRNW | AT91C_PC10_NCS4_CFCS | AT91C_PC11_NCS5_CFCE1 | AT91C_PC12_NCS6_CFCE2; + + *AT91C_PIOB_PER = AT91C_CF_PB0_CD1; + *AT91C_PIOB_ODR = AT91C_CF_PB0_CD1; + *AT91C_PIOC_PER = AT91C_CF_PC5_RESET; + ((AT91PS_PIO)AT91C_BASE_PIOB)->PIO_OER = AT91C_CF_PC5_RESET; + ((AT91PS_PIO)AT91C_BASE_PIOB)->PIO_CODR = AT91C_CF_PC5_RESET; + + + /* Setup Compact Flash, enable the address range of CS4 */ + *AT91C_EBI_CSA |= AT91C_EBI_CS4A_SMC_COMPACTFLASH; + +#define SM_RWH (4 << 28) /* hold time, was 2 */ +#define SM_RWS (6 << 24) /* setup time, was 6 */ +#define SM_TDF (1 << 8) /* data float time, */ +#define SM_NWS (32) /* wait states, NOTE: 0=1.5, 1=2.5, etc */ + + + ((AT91PS_SMC2)AT91C_BASE_SMC2)->SMC2_CSR[4] = SM_RWH | SM_RWS | AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_16 | AT91C_SMC2_BAT | AT91C_SMC2_WSEN | SM_NWS; + + debug("AT9RM92000 CF driver\n"); + + return 0; + +} + +#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */ /* YD End */ diff -uNrp u-boot-1.1.1-ori/common/cmd_ide.c u-boot-1.1.1/common/cmd_ide.c --- u-boot-1.1.1-ori/common/cmd_ide.c Fri Apr 23 22:32:06 2004 +++ u-boot-1.1.1/common/cmd_ide.c Tue Sep 7 10:38:42 2004 @@ -787,7 +787,7 @@ set_pcmcia_timing (int pmode)
/* ------------------------------------------------------------------------- */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_AT91RM9200DK) /*YD*/ static void __inline__ ide_outb(int dev, int port, unsigned char val) { @@ -807,7 +807,7 @@ ide_outb(int dev, int port, unsigned cha #endif /* __PPC__ */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_AT91RM9200DK) /*YD*/ static unsigned char __inline__ ide_inb(int dev, int port) { @@ -885,7 +885,7 @@ input_swap_data(int dev, ulong *sect_buf #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_AT91RM9200DK) /*YD*/ static void output_data(int dev, ulong *sect_buf, int words) { @@ -929,7 +929,7 @@ output_data(int dev, ulong *sect_buf, in } #endif /* __PPC__ */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_AT91RM9200DK) /*YD*/ static void input_data(int dev, ulong *sect_buf, int words) { @@ -1585,7 +1585,7 @@ static void ide_led (uchar led, uchar st #define AT_PRINTF(fmt,args...) #endif
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) +#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_AT91RM9200DK) /*YD*/ /* since ATAPI may use commands with not 4 bytes alligned length * we have our own transfer functions, 2 bytes alligned */ static void diff -uNrp u-boot-1.1.1-ori/common/cmd_pcmcia.c u-boot-1.1.1/common/cmd_pcmcia.c --- u-boot-1.1.1-ori/common/cmd_pcmcia.c Sun Apr 18 19:39:39 2004 +++ u-boot-1.1.1/common/cmd_pcmcia.c Tue Sep 7 10:32:25 2004 @@ -99,7 +99,7 @@ static u_int m8xx_get_speed(u_int ns, u_ /* -------------------------------------------------------------------- */
#ifndef CONFIG_PXA_PCMCIA - +#ifndef CONFIG_AT91RM9200DK /* look up table for pgcrx registers */
static u_int *pcmcia_pgcrx[2] = { @@ -108,6 +108,7 @@ static u_int *pcmcia_pgcrx[2] = { }; #define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
+#endif /* CONFIG_AT91RM9200DK */ #endif /* CONFIG_PXA_PCMCIA */
#endif /* CONFIG_I82365 */ @@ -166,6 +167,7 @@ int pcmcia_on (void) #else
#ifndef CONFIG_PXA_PCMCIA +#ifndef CONFIG_AT91RM9200DK
#ifdef CONFIG_HMI10 # define HMI10_FRAM_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(2) | PCMCIA_SL(4)) @@ -288,8 +290,10 @@ int pcmcia_on (void) return (rc); }
+#endif /* CONFIG_AT91RM9200DK */ #endif /* CONFIG_PXA_PCMCIA */
+ #endif /* CONFIG_I82365 */
#ifdef CONFIG_PXA_PCMCIA @@ -389,6 +393,45 @@ int pcmcia_on (void)
#endif /* CONFIG_PXA_PCMCIA */
+ +#ifdef CONFIG_AT91RM9200DK /* YD */ + +static int hardware_enable (int slot) +{ + at91_pcmcia_low_level_init(); + return 0; /* No hardware to enable */ +} + +static int hardware_disable(int slot) +{ + return 0; /* No hardware to disable */ +} + +static int voltage_set(int slot, int vcc, int vpp) +{ + return 0; +} + +void msWait(unsigned msVal) +{ + udelay(msVal*1000); +} + +int pcmcia_on (void) +{ + int rc; + + debug ("%s\n", __FUNCTION__); + + hardware_enable(0); + + rc = check_ide_device (0); /* use just slot 0 */ + + return rc; +} + +#endif /* CONFIG_AT91RM9200DK */ /* YD End */ + /* -------------------------------------------------------------------- */
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) @@ -405,7 +448,7 @@ static int pcmcia_off (void) #else
#ifndef CONFIG_PXA_PCMCIA - +#ifndef CONFIG_AT91RM9200DK /*YD*/ static int pcmcia_off (void) { int i; @@ -438,6 +481,7 @@ static int pcmcia_off (void) return 0; }
+#endif /* CONFIG_AT91RM9200DK */ /*YD*/ #endif /* CONFIG_PXA_PCMCIA */
#endif /* CONFIG_I82365 */ @@ -449,6 +493,13 @@ static int pcmcia_off (void) } #endif
+#ifdef CONFIG_AT91RM9200DK /*YD*/ +static int pcmcia_off (void) +{ + return 0; +} +#endif /*YD End*/ + #endif /* CFG_CMD_PCMCIA */
/* -------------------------------------------------------------------- */ @@ -541,7 +592,12 @@ static int check_ide_device (int slot) ide_devices_found |= (1 << slot);
/* set I/O area in config reg -> only valid for ARGOSY D5!!! */ - *((uchar *)(addr + config_base)) = 1; +#ifndef CONFIG_AT91RM9200DK /*YD*/ + *((uchar *)(addr + config_base)) = 1; +#endif +#ifdef CONFIG_AT91RM9200DK + *((uchar *)(addr + config_base)) = 0;/* No iois16 line on dk board...*/ +#endif /*YD End*/
return (0); }
diff -uNrp u-boot-1.1.1-ori/include/configs/at91rm9200dk.h u-boot-1.1.1/include/configs/at91rm9200dk.h --- u-boot-1.1.1-ori/include/configs/at91rm9200dk.h Mon Mar 15 10:00:03 2004 +++ u-boot-1.1.1/include/configs/at91rm9200dk.h Tue Sep 7 10:26:36 2004 @@ -73,7 +73,9 @@ CFG_CMD_AUTOSCRIPT | \ CFG_CMD_FPGA | \ CFG_CMD_MISC | \ - CFG_CMD_LOADS )) + CFG_CMD_LOADS ) | \ + CFG_CMD_PCMCIA | \ + CFG_CMD_IDE )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> @@ -188,4 +190,43 @@ struct bd_info_ext #error CONFIG_USE_IRQ not supported #endif
+ +/*Pmcia Pc card*/ +#define DEBUG 2 +/* #define IDE_DEBUG 2 */ +#define CONFIG_IDE_8xx_PCCARD 1 +/*#define CONFIG_PXA_PCMCIA 1*/ +#define CONFIG_PXA_IDE 1 + +#define CONFIG_PCMCIA_SLOT_A 1 +/* just to keep build system happy */ + +#define CFG_PCMCIA_MEM_ADDR 0x50000000 +#define CFG_PCMCIA_MEM_SIZE 0x10000000 + +/* memory configuration */ + +#define CFG_IDE_MAXBUS 1 +/* max. 1 IDE bus */ +#define CFG_IDE_MAXDEVICE 1 +/* max. 1 drive per IDE bus */ + + +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_SUPPORT_VFAT + + +#define CFG_ATA_IDE0_OFFSET 0x0000 + +#define CFG_ATA_BASE_ADDR 0x50000000|(1 << 22) + +/* Offset for data I/O */ +#define CFG_ATA_DATA_OFFSET 0/*0x1f0*/ + +/* Offset for normal register accesses */ +#define CFG_ATA_REG_OFFSET 0/*0x1f0*/ + +/* Offset for alternate registers */ +#define CFG_ATA_ALT_OFFSET 0e/*0x3f0*/ + #endif