Am 06.02.20 um 10:45 schrieb Lars Povlsen:
This patch fixes an stability issue seen on some vcoreiii targets, which was root caused to a cache inconsistency situation.
The inconsistency was caused by having kuseg pointing to NOR area but used as a stack/gd/heap area during initialization, while only relatively late remapping the RAM area into kuseg position.
The fix is to initialize the DDR right after the TLB setup, and then remapping it into position before gd/stack/heap usage.
Reported-by: Ramin Seyed-Moussavi ramin.moussavi@yacoub.de Reviewed-by: Alexandre Belloni alexandre.belloni@bootlin.com Reviewed-by: Horatiu Vultur horatiu.vultur@microchip.com Signed-off-by: Lars Povlsen lars.povlsen@microchip.com
arch/mips/mach-mscc/cpu.c | 9 +++++---- arch/mips/mach-mscc/dram.c | 14 +++++--------- arch/mips/mach-mscc/include/mach/ddr.h | 4 ---- arch/mips/mach-mscc/lowlevel_init.S | 17 ++++++++++++++++- 4 files changed, 26 insertions(+), 18 deletions(-)
applied to u-boot-mips, thanks.