
Hi Tom, Thank you for the reply. It looks like some of changes are only appeared in openbmc u-boot repo.
Hi Joel, Could you advise how to send the patch to openbmc u-boot repo? Thank you.
BRs, Potin -----Original Message----- From: Tom Rini trini@konsulko.com Sent: Wednesday, January 19, 2022 1:48 AM To: Potin Lai (賴柏廷) Potin.Lai@quantatw.com Cc: Albert Aribaud albert.u.boot@aribaud.net; Chia-Wei, Wang chiawei_wang@aspeedtech.com; Dylan Hung dylan_hung@aspeedtech.com; Klaus Heinrich Kiwi klaus@linux.vnet.ibm.com; Joel Stanley joel@jms.id.au; Patrick Williams patrick@stwcx.xyz; u-boot@lists.denx.de Subject: Re: [PATCH v2] arm: dts: Aspeed: add Bletchley dts
On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
Initial introduction of Bletchley equipped with Aspeed 2600 BMC SoC.
Signed-off-by: Potin Lai potin.lai@quantatw.com Reviewed-by: Patrick Williams patrick@stwcx.xyz
Change since v1:
- Disable mdio0, mdio1, mdio2
- Remove mac0, mac1, mac3 (keep disabled)
- Enable mac2, and set to fixed-link
arch/arm/dts/Makefile | 3 +- arch/arm/dts/ast2600-bletchley.dts | 285 +++++++++++++++++++++++++++++ 2 files changed, 287 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/ast2600-bletchley.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index df844065cd..a172a9f8c6 100755 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ast2600-rainier.dtb \ ast2600-slt.dtb \ ast2600-tacoma.dtb \
- ast2600-intel.dtb
- ast2600-intel.dtb \
- ast2600-bletchley.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
Does this depend on other changes that I missed? We don't have those lines in the Makefile today, thanks.
-- Tom