On Thu, Nov 7, 2019 at 9:40 AM Marek Vasut marex@denx.de wrote:
On 11/7/19 9:36 AM, Simon Goldschmidt wrote:
On Thu, Nov 7, 2019 at 9:33 AM Marek Vasut wrote:
On 11/7/19 4:31 AM, Ley Foon Tan wrote:
On Thu, Nov 7, 2019 at 10:49 AM Marek Vasut wrote:
On 11/7/19 3:10 AM, Ley Foon Tan wrote: [...]
diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi index 322c858c4b..d55460755f 100644 --- a/arch/arm/dts/socfpga-common-u-boot.dtsi +++ b/arch/arm/dts/socfpga-common-u-boot.dtsi @@ -10,6 +10,10 @@ }; };
+&clkmgr {
u-boot,dm-pre-reloc;+};
&rst { u-boot,dm-pre-reloc; }; @@ -17,3 +21,7 @@ &sdr { u-boot,dm-pre-reloc; };
+&sysmgr {
u-boot,dm-pre-reloc;+};
Gen5 doesn't have any clock driver, so does it really make sense to retain the clkmgr node in SPL now ? Seems like this only grows the SPL size with no benefit.
But, we need to get clkmgr base address from DT even we don't have clock driver for it. So, clkmgr needs enable in SPL.
Plus gen5 will have get clock manager soon ;-)
Keep in mind we're already in -rc1 , so that's for next release.
Right, that's in the gen5 DM series for next. I just wanted to say it's ok to add this here because we'll need it anyway soon.
Regards, Simon