
On 2023/10/18 05:40, Jonas Karlman wrote:
Xunlong Orange Pi 5 Plus is a single-board computer based on the Rockchip RK3588 SoC. The board provides abundant interfaces, including two HDMI output ports, one HDMI input port, two 2.5G Ethernet ports, M.2 M-Key slot, M.2 E-Key slot, two USB 3.0, two USB 2.0, and two Type-C.
Features tested on a Orange Pi 5 Plus 4GB v1.2:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe
- USB 2.0 host
- Ethernet
Device tree is imported from linux v6.7-rockchip-dts64-1 tag.
Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
Cc: Ondrej Jirman megi@xff.cz
arch/arm/dts/Makefile | 1 + .../dts/rk3588-orangepi-5-plus-u-boot.dtsi | 27 + arch/arm/dts/rk3588-orangepi-5-plus.dts | 848 ++++++++++++++++++ board/rockchip/evb_rk3588/MAINTAINERS | 7 + configs/orangepi-5-plus-rk3588_defconfig | 105 +++ doc/board/rockchip/rockchip.rst | 1 + 6 files changed, 989 insertions(+) create mode 100644 arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588-orangepi-5-plus.dts create mode 100644 configs/orangepi-5-plus-rk3588_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index fd99bb76fa6b..c1a760592df5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -193,6 +193,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-evb1-v10.dtb \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \
- rk3588-orangepi-5-plus.dtb \ rk3588s-rock-5a.dtb \ rk3588-rock-5b.dtb
diff --git a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi new file mode 100644 index 000000000000..b0f5c667197c --- /dev/null +++ b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+#include "rk3588-u-boot.dtsi"
+/ {
- chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
- };
+};
+&fspim1_pins {
- bootph-all;
+};
+&sdhci {
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
+};
+&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
- flash@0 {
bootph-pre-ram;
- };
+}; diff --git a/arch/arm/dts/rk3588-orangepi-5-plus.dts b/arch/arm/dts/rk3588-orangepi-5-plus.dts new file mode 100644 index 000000000000..298c183d6f4f --- /dev/null +++ b/arch/arm/dts/rk3588-orangepi-5-plus.dts @@ -0,0 +1,848 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2023 Ondřej Jirman megi@xff.cz
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/usb/pd.h> +#include "rk3588.dtsi"
+/ {
- model = "Xunlong Orange Pi 5 Plus";
- compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588";
- aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
serial2 = &uart2;
- };
- chosen {
stdout-path = "serial2:1500000n8";
- };
- adc-keys-0 {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-maskrom {
label = "Mask Rom";
linux,code = <KEY_SETUP>;
press-threshold-microvolt = <2000>;
};
- };
- adc-keys-1 {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-recovery {
label = "Recovery";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <2000>;
};
- };
- speaker_amp: speaker-audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
sound-name-prefix = "Speaker Amp";
- };
- headphone_amp: headphones-audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
sound-name-prefix = "Headphones Amp";
- };
- ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ir_receiver_pin>;
- };
- gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&blue_led_pin>;
led {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
};
- };
- fan: pwm-fan {
compatible = "pwm-fan";
cooling-levels = <0 70 75 80 100>;
fan-supply = <&vcc5v0_sys>;
pwms = <&pwm3 0 50000 0>;
#cooling-cells = <2>;
- };
- pwm-leds {
compatible = "pwm-leds";
led {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <2>;
max-brightness = <255>;
pwms = <&pwm2 0 25000 0>;
};
- };
- sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_detect>;
simple-audio-card,name = "Analog";
simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>;
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,hp-det-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>;
simple-audio-card,bitclock-master = <&daicpu>;
simple-audio-card,frame-master = <&daicpu>;
/*TODO: SARADC_IN3 is used as MIC detection / key input */
simple-audio-card,widgets =
"Microphone", "Onboard Microphone",
"Microphone", "Microphone Jack",
"Speaker", "Speaker",
"Headphone", "Headphones";
simple-audio-card,routing =
"Headphones", "LOUT1",
"Headphones", "ROUT1",
"Speaker", "LOUT2",
"Speaker", "ROUT2",
"Headphones", "Headphones Amp OUTL",
"Headphones", "Headphones Amp OUTR",
"Headphones Amp INL", "LOUT1",
"Headphones Amp INR", "ROUT1",
"Speaker", "Speaker Amp OUTL",
"Speaker", "Speaker Amp OUTR",
"Speaker Amp INL", "LOUT2",
"Speaker Amp INR", "ROUT2",
/* single ended signal to LINPUT1 */
"LINPUT1", "Microphone Jack",
"RINPUT1", "Microphone Jack",
/* differential signal */
"LINPUT2", "Onboard Microphone",
"RINPUT2", "Onboard Microphone";
daicpu: simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
system-clock-frequency = <12288000>;
};
daicodec: simple-audio-card,codec {
sound-dai = <&es8388>;
system-clock-frequency = <12288000>;
};
- };
- vcc3v3_pcie30: vcc3v3-pcie30-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
vin-supply = <&vcc5v0_sys>;
- };
- vcc3v3_pcie_eth: vcc3v3-pcie-eth-regulator {
compatible = "regulator-fixed";
gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
regulator-name = "vcc3v3_pcie_eth";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <50000>;
vin-supply = <&vcc5v0_sys>;
- };
- vcc3v3_wf: vcc3v3-wf-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc3v3_wf";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <50000>;
vin-supply = <&vcc5v0_sys>;
- };
- vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- };
- vcc5v0_usb20: vcc5v0-usb20-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb20_en>;
regulator-name = "vcc5v0_usb20";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
- };
+};
+&combphy0_ps {
- status = "okay";
+};
+&combphy1_ps {
- status = "okay";
+};
+&combphy2_psu {
- status = "okay";
+};
+&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
+};
+&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
+};
+&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
+};
+&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
+};
+&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
+};
+&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
+};
+&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
+};
+&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
+};
+&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
- vdd_cpu_big0_s0: regulator@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big0_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
- };
- vdd_cpu_big1_s0: regulator@43 {
compatible = "rockchip,rk8603", "rockchip,rk8602";
reg = <0x43>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu_big1_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
- };
+};
+&i2c6 {
- clock-frequency = <400000>;
- status = "okay";
- hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <0>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
wakeup-source;
- };
+};
+&i2c7 {
- status = "okay";
- /* PLDO2 vcca 1.8V, BUCK8 gated by PLDO2 being enabled */
- es8388: audio-codec@11 {
compatible = "everest,es8388";
reg = <0x11>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
AVDD-supply = <&vcc_1v8_s0>;
DVDD-supply = <&vcc_1v8_s0>;
HPVDD-supply = <&vcc_3v3_s0>;
PVDD-supply = <&vcc_3v3_s0>;
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
#sound-dai-cells = <0>;
- };
+};
+&i2s0_8ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_lrck
&i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
- status = "okay";
+};
+&i2s2_2ch {
- pinctrl-names = "default";
- pinctrl-0 = <&i2s2m0_lrck
&i2s2m0_sclk
&i2s2m0_sdi
&i2s2m0_sdo>;
- status = "okay";
+};
+/* phy1 - M.KEY socket */ +&pcie2x1l0 {
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_wf>;
- status = "okay";
+};
+/* phy2 - right ethernet port */ +&pcie2x1l1 {
- reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_eth>;
- status = "okay";
+};
+/* phy0 - left ethernet port */ +&pcie2x1l2 {
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie_eth>;
- status = "okay";
+};
+&pcie30phy {
- status = "okay";
+};
+&pcie3x4 {
- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc3v3_pcie30>;
- status = "okay";
+};
+&pinctrl {
- hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
- };
- leds {
blue_led_pin: blue-led {
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
- };
- ir-receiver {
ir_receiver_pin: ir-receiver-pin {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
- };
- sound {
hp_detect: hp-detect {
rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
- };
- usb {
vcc5v0_usb20_en: vcc5v0-usb20-en {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
- };
+};
+&pwm2 {
- pinctrl-0 = <&pwm2m1_pins>;
- pinctrl-names = "default";
- status = "okay";
+};
+&pwm3 {
- pinctrl-0 = <&pwm3m1_pins>;
- status = "okay";
+};
+&saradc {
- vref-supply = <&vcc_1v8_s0>;
- status = "okay";
+};
+&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- max-frequency = <200000000>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- status = "okay";
+};
+&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- no-sdio;
- no-mmc;
- sd-uhs-sdr104;
- vmmc-supply = <&vcc_3v3_s3>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
+};
+&sfc {
- pinctrl-names = "default";
- pinctrl-0 = <&fspim1_pins>;
- status = "okay";
- spi_flash: flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <100000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
- };
+};
+&spi2 {
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- num-cs = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- status = "okay";
- pmic@0 {
compatible = "rockchip,rk806";
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
spi-max-frequency = <1000000>;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc5v0_sys>;
vcc6-supply = <&vcc5v0_sys>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc5v0_sys>;
vcc9-supply = <&vcc5v0_sys>;
vcc10-supply = <&vcc5v0_sys>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc5v0_sys>;
vcc13-supply = <&vdd2_ddr_s3>;
vcc14-supply = <&vdd2_ddr_s3>;
vcca-supply = <&vcc5v0_sys>;
gpio-controller;
#gpio-cells = <2>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
regulators {
vdd_gpu_s0: dcdc-reg1 {
regulator-name = "vdd_gpu_s0";
regulator-boot-on;
regulator-enable-ramp-delay = <400>;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: dcdc-reg2 {
regulator-name = "vdd_cpu_lit_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_log_s0: dcdc-reg3 {
regulator-name = "vdd_log_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <825000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_vdenc_s0: dcdc-reg4 {
regulator-name = "vdd_vdenc_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <825000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg5 {
regulator-name = "vdd_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <900000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vdd2_ddr_s3: dcdc-reg6 {
regulator-name = "vdd2_ddr_s3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_2v0_pldo_s3: dcdc-reg7 {
regulator-name = "vdd_2v0_pldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2000000>;
};
};
vcc_3v3_s3: dcdc-reg8 {
regulator-name = "vcc_3v3_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vddq_ddr_s0: dcdc-reg9 {
regulator-name = "vddq_ddr_s0";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg10 {
regulator-name = "vcc_1v8_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avcc_1v8_s0: pldo-reg1 {
regulator-name = "avcc_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
/* shorted to avcc_1v8_s0 on the board */
vcc_1v8_s0: pldo-reg2 {
regulator-name = "vcc_1v8_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
avdd_1v2_s0: pldo-reg3 {
regulator-name = "avdd_1v2_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3_s0: pldo-reg4 {
regulator-name = "vcc_3v3_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-name = "vccio_sd_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
pldo6_s3: pldo-reg6 {
regulator-name = "pldo6_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-name = "vdd_0v75_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdd_ddr_pll_s0: nldo-reg2 {
regulator-name = "vdd_ddr_pll_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
avdd_0v75_s0: nldo-reg3 {
regulator-name = "avdd_0v75_s0";
regulator-always-on;
regulator-boot-on;
/*
* The schematic mentions that actual setting
* should be 0.8375V. RK3588 datasheet specifies
* maximum as 0.825V. So we set datasheet max
* here.
*/
regulator-min-microvolt = <825000>;
regulator-max-microvolt = <825000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v85_s0: nldo-reg4 {
regulator-name = "vdd_0v85_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_0v75_s0: nldo-reg5 {
regulator-name = "vdd_0v75_s0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
- };
+};
+&tsadc {
- status = "okay";
+};
+&u2phy2 {
- status = "okay";
+};
+&u2phy3 {
- status = "okay";
+};
+&u2phy2_host {
- phy-supply = <&vcc5v0_usb20>;
- status = "okay";
+};
+&u2phy3_host {
- phy-supply = <&vcc5v0_usb20>;
- status = "okay";
+};
+&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- status = "okay";
+};
+&uart9 {
- pinctrl-0 = <&uart9m0_xfer>;
- status = "okay";
+};
+&usb_host0_ehci {
- status = "okay";
+};
+&usb_host0_ohci {
- status = "okay";
+};
+&usb_host1_ehci {
- status = "okay";
+};
+&usb_host1_ohci {
- status = "okay";
+}; diff --git a/board/rockchip/evb_rk3588/MAINTAINERS b/board/rockchip/evb_rk3588/MAINTAINERS index c75f47254066..2bd44bc58728 100644 --- a/board/rockchip/evb_rk3588/MAINTAINERS +++ b/board/rockchip/evb_rk3588/MAINTAINERS @@ -13,3 +13,10 @@ S: Maintained F: configs/orangepi-5-rk3588s_defconfig F: arch/arm/dts/rk3588s-orangepi-5.dts F: arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi
+ORANGEPI-5-PLUS-RK3588 +M: Jonas Karlman jonas@kwiboo.se +S: Maintained +F: configs/orangepi-5-plus-rk3588_defconfig +F: arch/arm/dts/rk3588-orangepi-5-plus.dts +F: arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig new file mode 100644 index 000000000000..04736996217e --- /dev/null +++ b/configs/orangepi-5-plus-rk3588_defconfig @@ -0,0 +1,105 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_EVB_RK3588=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_PHYLIB=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index a4b69b345d91..ffbebd0bb3da 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -119,6 +119,7 @@ List of mainline supported Rockchip boards: - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s)
- Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
- rv1108
- Rockchip Evb-rv1108 (evb-rv1108)