From: Chase Maupin Chase.Maupin@ti.com
* For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin
Signed-off-by: Chase Maupin Chase.Maupin@ti.com --- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index ba6b59b..388336f 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -36,7 +36,7 @@ #define CMD_FORCE 0x00 #define CMD_DELAY 0x00
-#define EMIF_READ_LATENCY 0x04 +#define EMIF_READ_LATENCY 0x05 #define EMIF_TIM1 0x0666B3D6 #define EMIF_TIM2 0x143731DA #define EMIF_TIM3 0x00000347