27 Oct
2010
27 Oct
'10
5:33 p.m.
Hello Reinhard
Am 27.10.2010 16:43, schrieb Reinhard Meyer:
Dear Matthias Weisser,
struct wdog_regs {
- u32 wcr; /* Control */
- u32 wsr; /* Service */
- u32 wrsr; /* Reset Status */
- u32 wicr; /* Interrupt Control */
- u32 wmcr; /* Misc Control */
- u16 wcr; /* Control */
- u16 wsr; /* Service */
- u16 wrsr; /* Reset Status */
- u16 wicr; /* Interrupt Control */
- u16 wmcr; /* Misc Control */ };
What catches my ARM-aware eye:
I do not know the hardware, but are those registers really arranged on 2 byte boundaries (00, 02, 04, 06, 08, 0a, .. offsets)? Probably yes, assuming your code is tested ;)
Yes, they are. I looked into the datasheet multiple times to confirm that. Not typical for an ARM system, but how knows which IP Freescale recycled here ;-)
If you want to convince yourself take a look at page 1988 of http://cache.freescale.com/files/dsp/doc/ref_manual/IMX25RM.pdf?fpsp=1
Matthias