On Fri, 25 Feb 2005 14:56:17 -0800, Shawn Jin shawnxjin@gmail.com wrote:
In short: cache is like normal memory, just very fast (which does not play a role here). We just have to make sure that no cache fills or cache flushes will be done (at least not for that part of the data cache which is being used for the initial stack).
I don't see any caches are in a system memory mapping. Then I thought it could be only accessed by those cache specific instructions, like dcread. That's my misunderstanding.
Cache is a dynamic 'shadow' of main memory. Any region marked cacheable may loaded into the cache so that subsequent reads are faster. Cache operation is transparent to the code (except for cache control operations like flush and invalidate). With some careful coding you can make sure that stack is fully in the cached so that stack read/writes do not go out to SDRAM.
There are plenty of descriptions of how a cache works online. It's worth the time to research and understand it. Cache operation has complex and subtle impact on your firmware.