Hi; I have managed to boot up the board into PCI mode after looking at the various clock configuration modes laid down in MPC8280EC document. However, I have tried with some values but I can't get PCI to run at 66.7 MHz. In addition, the PCIDF read from SCCR does not seem to match the values laid down in the document with the MODCK values configured at SW6. Please advise if anyone has managed to get the PCI interface of PQ2FADS-ZU to run at 66.7 MHz. Thanks.
/* CONFIG_PCI : 1010_010 - 1010_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10)
MPC8260 Reset Status: External Soft, External Hard
MPC8260 Clock Configuration - Bus-to-Core Mult 4x, VCO Div -1, 60x Bus Freq 25-75 , Core Freq 100-300 - dfbrg 1, corecnf 0x0a, busdf 3, cpmdf 1, plldf 0, pllmf 3, pcidf 5 - vco_out 400000000, scc_clk 100000000, brg_clk 25000000 - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000 - pci_clk 33333333
CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 400 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot>
/* CONFIG_PCI : 1101_000 - 1101_100 */ U-Boot 1.1.2 (Jun 16 2005 - 11:09:10)
MPC8260 Reset Status: External Soft, External Hard
MPC8260 Clock Configuration - Bus-to-Core Mult 3x, VCO Div -1, 60x Bus Freq 16-50 , Core Freq 50-150 - dfbrg 1, corecnf 0x10, busdf 4, cpmdf 1, plldf 0, pllmf 4, pcidf 9 - vco_out 500000000, scc_clk 125000000, brg_clk 31250000 - cpu_clk 300000000, cpm_clk 250000000, bus_clk 100000000 - pci_clk 25000000
CPU: MPC8260 (HiP7 Rev 13, Mask 0.1 1K49M) at 300 MHz Board: Motorola PQ2FADS-ZU DRAM: 32 MB FLASH: 8 MB *** Warning - bad CRC, using default environment
In: serial Out: serial Err: serial Net: FCC2 ETHERNET Hit any key to stop autoboot: 0 u-boot>
Regards, TEH
Yuli Barcohen yuli@arabellasw.com on 06/15/2005 11:18:46 PM
To: "KokHow Teh" KokHow.Teh@marconi.com cc: u-boot-users@lists.sourceforge.net
Subject: Re: [U-Boot-Users] PQ2FADS-ZU PQ28280 access to 60x bus SDRAM failed when localbus is in PCI mode?
KokHow Teh writes:
Teh> I am having trouble with my PQ2FADS-ZU board with a PQ2 8280 Teh> processor that when the localbus is put into PCI mode with LBPC Teh> = 01, all accesses to 60x bus SDRAM fails. Uboot failed in Teh> get_ram_size() routine. The selection of localbus operation Teh> mode is done by SW9. Switch the jumper back to localbus SDRAM Teh> mode, U-boot boots to the prompt and access to 60x SDRAM is Teh> fine. Does anybody have similar experience? Any insight is Teh> appreciated.
Such a configuration works OK for me. There are some things to check. You don't write what HRCW you use: from BCSR or from flash. If the latter, you have to change pin assignment bits and MODCKH accordingly. Also, clocks are calculated differently in PCI and local bus modes. Check the MODCK/MODCKH values (SW6). Valid local bus mode values can be invalid in PCI mode.
-- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli@arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================