Hi Kans,
On Tuesday 27 November 2007, kans wrote:
I am using u-boot 1.3.0-rc3 for my custom 440SPE board and configured PCIE1 as endpoint.
A general comment: You should base your work on the "for-1.3.1" branch of the u-boot-ppc4xx custodian repository:
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-ppc4xx.git;a=shortlog;...
Amongst other changes to the 4xx PCIe support, this new version now support "dynamic" selection of root-complex/endpoint per PCIe port. This is done via the env variable "pcie_mode". By setting it to
=> setenv pcie_mode RP:EP:RP
you configure port 1 to endpoint and all other ports to root-complex.
After configuring the KATMAI board as RC(running Linux), I am able to establish the link between KATMAI and my board.
I have few doubts here.
- CFG space (OUTBOUND BAR4) is mentioned as 512MB minimum. But the CFGMSK
register says it can start from 128 Bytes. Using lesser values from 512MB creates Machine Check exception.
Which registers are you referring to exactly?
- I have set PIMEN as 0x1. ie. Enable access for BAR0(I have set
PIM01SAL/H for 1MB). The Katmai board views BAR0(1MB memory), BAR2 as IO, and BAR4 as Memory. It doesnt assign any addresses to BAR2 and BAR4. Also I have not enabled any IO space in my custom board.
Please let me know for
- Why there are Machine check exceptions using lesser values in CFG(less
than 512MB)? 2. Why other BARs are getting enabled?
Perhaps because they are not explicitly disabled?
Please try again with the new code from the for-1.3.1 branch. It has some changes for the endpoint support too.
Best regards, Stefan
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