Hi,
I found that there is a possible LAW conflict between SPD and 85xx default settings.
LAWBAR0 is used for DDR whereas LAWBAR1 for PCI1. But SPD initializes DDR LAW as LAWBAR1.
I think it could be a setup mess, right?
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index 6da5367..c4d3956 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -1043,12 +1043,12 @@ setup_laws_and_tlbs(unsigned int memsize /* * Set up LAWBAR for all of DDR. */ - ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); - ecm->lawar1 = (LAWAR_EN + ecm->lawbar0 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff); + ecm->lawar0 = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size)); - debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1); - debug("DDR: LARAR1=0x%08x\n", ecm->lawar1); + debug("DDR: LAWBAR0=0x%08x\n", ecm->lawbar0); + debug("DDR: LARAR0=0x%08x\n", ecm->lawar0);
/* * Confirm that the requested amount of memory was mapped.
Best regards,
Sam
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